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As a Mixed Signal Hardware Design Engineer, you will be responsible for the design, implementation and verification of digital and power portions of wireless designs across all Apple products.
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Verilog, SystemVerilog, Low power design, Perl, Python, EDA tools, Cadence, Synopsys. Knowledge AND hand-on experience from industry ASIC design flow including RTL coding, IP Integration, debugging/verification, and supporting synthesis and timing closure.
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As an ASIC Design Engineer in the Pixel IP design team, you will work closely with many multi-functional teams (chip integration, physical design, power, logic design, and verification) to build commitment and low power pixel processing engines.
$170,700 - $300,200 a yearExpandApply NowActive JobUpdated 4 days ago - UpvoteDownvoteShare Job
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We have partnered with a semiconductor manufacturing firm in the San Jose, CA area to provide them with a Senior Staff Packaging Engineer. Drive alignment between module substrate (PCB) design requirements and supplier capabilities, to enable new product development and volume manufacturing of power modules.
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Perform ASIC design flow enablement, execution, PPA (Power, Performance, Area) analysis, synthesis, APR, and layout verification. - Experience in digital circuit design, front end model creation and functional verification.
$91,500 - $137,436 a yearFull-timeExpandApply NowActive JobUpdated Today - UpvoteDownvoteShare Job
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We are looking for a talented, self-driven and motivated Principal SI/PI Engineer with a strong experience in simulation and verification to join the System-Signal integrity and Power Integrity team of Adaptive and Embedded Computing Group in San Jose. This team provide signal integrity and power integrity support for on-die, on-interposer, on-package and on PCB for AECG products.
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Work in a team that drives architecture, design, implementation, and verification of RF/mixed-signal systems that include circuit blocks such as LNAs, Mixers, PAs, PLLs, VCOs, ADCs, DACs. Since then, we’ve developed a full line of products that drive 4G and 5G infrastructure; enable data center, metro and long-haul optical interconnects; bring 10Gbit to the home; power the IoT revolution; and enable robust and reliable communication in harsh industrial environments.
$146,200 - $227,010 a yearFull-timeExpandApply NowActive JobUpdated Today - UpvoteDownvoteShare Job
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MaxLinear is seeking a Staff RF/MS IC Design Engineer to join our growing team. We are a fabless system-on-chip product company, striving to improve the world’s communication networks for everyone through our highly integrated radio-frequency (RF), analog, digital, and mixed-signal semiconductor solutions for access and connectivity, wired and wireless infrastructure, and industrial and multi-market applications.
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Ability to set-up Design Rule Checks for verification of every aspect of the PCB layout a plus. Responsible for defining substrate/package design rules, process flow and material set for new automotive power module packages.
Up to $195,000 a yearFull-timeExpandApply NowActive JobUpdated 4 days ago - UpvoteDownvoteShare Job
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Work closely with chip architecture, design verification, physical design, DFT, and power teams to achieve tapeout success on designs – generally bridging the RTL and place and route. Execute low power design and physical synthesis, deploying knowledge of unified power format and power intent verification.
$170,000 - $230,000Full-timeExpandApply NowActive JobUpdated Today - UpvoteDownvoteShare Job
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The Digital ASIC Design Team is currently seeking candidates who will be responsible for the implementation and verification of DFT/DFD (Design for Test/Design for Debug) techniques for low power, multi voltage designs.
$143,000 - $215,000 a yearFull-timeExpandApply NowActive JobUpdated Today - UpvoteDownvoteShare Job
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BS, MS, or PhD in Power Electronics/Electrical Engineering, Computer Engineer, or related degree required (or equivalent experience) Experience with power circuit design, magnetic design, modeling, failure analysis, performance analysis, bring up, debug, and verification.
$152,000 - $287,500 a yearFull-timeExpandApply NowActive JobUpdated 3 months ago - UpvoteDownvoteShare Job
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Experience in DFT, low-power design, DDR, PCIe, embedded processor, and FPGA flow, etc. Solid experience in micro-architecture design, datapath pipeline design and optimization, and module-level design and verification, with multiple successful ASIC tape-outs or FPGA field deployments.
$136,800 - $280,000 a yearFull-timeExpandApply NowActive JobUpdated 4 months ago - UpvoteDownvoteShare Job
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The Senior Physical Design Engineer position is a full time or contract role located in Santa Clara, CA. Your day-to-day responsibilities will include ensuring to take the design from RTL to GDS with synthesis, Place n Route, timing, and Physical Verification.
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Support and perform EMC/EMI/ESD testing, thermal testing, reliability testing, hardware verification and validation. Design schematic, layout, signal integrity, and power activities including characterization and validation.
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verification engineer power jobs in Santa Clara, CA
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