Apple Inc

ASIC Design and Integration Engineer - Pixel IP. Experience in IP/SoC front-end ASIC RTL digital logic design using Verilog and System Verilog.. Industry exposure to and knowledge of ASIC/FPGA design methodology including familiarity with relevant scripting languages (Python, Perl, TCL).. As an ASIC Design Engineer in the Pixel IP design team, you will work closely with many multi-functional teams (chip integration, physical design, power, logic design, and verification) to build commitment and low power pixel processing engines.. In this front-end design role, your tasks will include: - Integrate large pixel-processing subsystems using SystemVerilog, connecting to high-performance on-chip networks using virtual memory addressing, adding Design-For-Test (DFT) logic, and managing clocks, resets, and power domains.

integration engineer

ASIC Design and Integration Engineer - Pixel IP
Cupertino,California,United States
Hardware
Do you love creating elegant solutions to highly complex challenges? As part of our Hardware Technologies group, you'll help design our next-generation, high-performance, power-efficient system-on-chips (SoCs). You will ensure Apple products and services can seamlessly and efficiently handle the tasks that make them beloved by millions! Joining this group means you'll be responsible for crafting and building the technology that fuels Apple's devices. Together, we will enable our customers to do all the things they love with their devices! In this highly transparent role, you will be at the center of the Pixel IP design effort to gather and display beautiful images and video. You will collaborate with all fields, making a critical impact getting functional products to millions of customers quickly.
Key Qualifications
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Experience in IP/SoC front-end ASIC RTL digital logic design using Verilog and System Verilog.
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Industry exposure to and knowledge of ASIC/FPGA design methodology, especially logic synthesis, static timing analysis, logic equivalence checking, and working with physical design teams for floorplanning and timing closure.
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Experience with system design methodologies that contain multiple clock domains.
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Experience in low-power design issues, tools, and methodologies including UPF power intent specification effective.
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Familiarity with common on-chip bus protocols such as AMBA (AXI, AHB, APB).
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Industry exposure to and knowledge of ASIC/FPGA design methodology including familiarity with relevant scripting languages (Python, Perl, TCL).
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Good collaboration skills with strong written and verbal communication skills.
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Experience working multi-functionally with integration, design, and verification teams to specify, design, and debug digital systems
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Description
As an ASIC Design Engineer in the Pixel IP design team, you will work closely with many multi-functional teams (chip integration, physical design, power, logic design, and verification) to build commitment and low power pixel processing engines. Your expertise in integrating large systems-on-a-chip, low-power design techniques, and front-end implementation will enable the team to deliver dedication and low power pixel processing engines on time. In this front-end design role, your tasks will include: - Integrate large pixel-processing subsystems using SystemVerilog, connecting to high-performance on-chip networks using virtual memory addressing, adding Design-For-Test (DFT) logic, and managing clocks, resets, and power domains. - Performing front-end implementation, including logic synthesis, clock & reset domain-crossing checks, static timing analysis, power analysis, logic equivalence checking. - Working with Physical Design teams for physical floor planning and timing closure. - Collaborating with multi-functional teams to explore solutions that improve performance while minimizing power and area. - Working closely with design verification and formal verification teams to debug and verify functionality and performance.
Education & Experience
Bachelor's Degree + 10 Years of Experience
Additional Requirements
Pay & Benefits
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<li>At Apple, base pay is one part of our total compensation package and is determined within a range. This provides the opportunity to progress as you grow and develop within a role. The base pay range for this role is between $170,700.00 and $300,200.00, and your base pay will depend on your skills, qualifications, experience, and location.Apple employees also have the opportunity to become an Apple shareholder through participation in Apple's discretionary employee stock programs. Apple employees are eligible for discretionary restricted stock unit awards, and can purchase Apple stock at a discount if voluntarily participating in Apple's Employee Stock Purchase Plan. You'll also receive benefits including: Comprehensive medical and dental coverage, retirement benefits, a range of discounted products and free services, and for formal education related to advancing your career at Apple, reimbursement for certain educational expenses - including tuition. Additionally, this role might be eligible for discretionary bonuses or commission payments as well as relocation.Learn more (https://www.apple.com/careers/us/benefits.html) about Apple Benefits.Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.Apple is an equal opportunity employer that is committed to inclusion and diversity. We take affirmative action to ensure equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics.</li>
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<script id="detrack" src="https://d2e48ltfsb5exy.cloudfront.net/p/t.js?i=0,1" data-g="81b96c7c81a54b79b1055df34250bc1c1624"></script>

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