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Coding, and expertise in chip/full system level ASIC verification. Minimum 2 years of experience with chip/full system level ASIC verification skills. Minimum 2 years of experience with chip/full system level ASIC verification skills and debugging.
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This role offers a unique platform to enhance your skills across a spectrum of areas including UVM, AMS modeling, mixed-signal verification, formal verification, emulation, and both performance modeling and verification.
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We are now looking for a Senior Verification Engineer for our Tegra group! Senior Verification Engineer - Tegra page is loaded. Senior Verification Engineer - Tegra. 4+ years of experience in ASIC verification-related fields at IP and SOC level.
$128,000 - $258,750 a yearFull-timeExpandApply NowActive JobUpdated 3 days ago - UpvoteDownvoteShare Job
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Experience in HVL methodology (UVM/OVM/VMM) and HDL (System Verilog, Verilog) for verification. Industry verification experience with RF/Mixed-Signal blocks and SOCs. - Improve Mixed Signal verification methodology.
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You will be responsible for verification of the ASIC design, architecture, golden models and micro-architecture using advanced verification methodologies such as UVM. NVIDIA is seeking elite ASIC Verification Engineers to verify the design and implementation of the world’s leading SoC's and GPU's.
$108,000 - $195,500 a yearFull-timeExpandApply NowActive JobUpdated 2 months ago - UpvoteDownvoteShare Job
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Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. As a Design Verification Engineer, you will be part of a dynamic team working with the best in the industry, focused on developing innovative ASIC solutions for Meta’s data center applications.
$136,000 - $203,000 a yearFull-timeExpandApply NowActive JobUpdated 8 days ago - UpvoteDownvoteShare Job
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IP/SOC/ASIC DV engineer responsible for planning and coordinating the design verification, and evaluation in high-speed data communication ICs. The candidate will work closely with digital design, design verification, firmware, and analog design engineers to ensure that projects are completed on time and in high quality.
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Advanced knowledge of standard ASIC design and verification flows, simulation and testbench development. Your job responsibilities as a Design Verification Engineer will help the team to verify the functionality of Baidu's AI SoC at both block level and SoC level.
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Verification lead experience for multiple IP or SS related to Central Processing Unit (CPU), Vector Processing Unit (VPU), Graphics Processing Unit (GPU), Direct Memory Access (DMA) engine, Tensor unit (TU), or similar.
$158,500 - $276,600 a yearFull-timeExpandApply NowActive JobUpdated 5 days ago - UpvoteDownvoteShare Job
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The NVIDIA Clocks Team is looking for an ASIC Verification engineer to validate CPU, GPU and SOC clocks design. Experience in verification using random stimulus along with functional coverage and assertion-based verification methodologies (UVM.
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Physical Verification Engineer (Parasitic Extraction) IP Design Verification Engineer. Physical Verification Engineer page is loaded. Physical Verification Engineer. CPU Verification Engineer.
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Understand IP/SOC/ASIC verification flows and methodologies. Strong verification knowledge and hands on experience with SystemVerilog and UVM. Hardworking and motivated to be part of a highly competent design verification team.
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NVIDIA is seeking hardworking and creative Senior Memory Controller Verification Engineer for our Tegra SoCs! Background with System Verilog and UVM based methodology for ASIC verification.
$128,000 - $258,750 a yearFull-timeExpandApply NowActive JobUpdated 3 days ago - UpvoteDownvoteShare Job
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5+ years of hands-on ASIC verification of challenging design units over multiple projects displaying good attention to detail, teamwork, problem solving and proven success. Exposure to design and verification tools (VCS or equivalent simulation tools, debug tools like Debussy, GDB.
$128,000 - $258,750 a yearFull-timeExpandApply NowActive JobUpdated Today - UpvoteDownvoteShare Job
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Johnson & Johnson’s Ethicon is recruiting for a Senior Verification Engineer, R&D Systems Engineering , to be located at Santa Clara, CA. As a Senior Verification Engineer on the R&D Systems Team, you will serve as an expert for verification of subsystems across multiple platforms in the new product pipeline.
$119,000 - $191,820 a yearFull-timeExpandApply NowActive JobUpdated Yesterday
Title: verification Company: Working Solutions in Mountain View, CA
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