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You will be responsible for package design activities with multiple engineering groups, such as Packaging, ASIC, AMS, Photonics and external partners to ensure design for manufacturing, reliability, and cost.
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As an Astera Labs Senior Semiconductor Packaging Engineer , you'll be developing connectivity products for leading cloud service providers and server/networking OEMs. Your primary focus will be utilizing your expertise in signal and power integrity to optimize package and system-level performance.
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Good understanding of cross-functional packaging areas: Si floor plan, package layout and architecture, enabling process technologies, thermal, mechanical, SI/PI, material, component & system level reliability, testing, and FA.
$170,700 - $300,200 a yearExpandApply NowActive JobUpdated Today - UpvoteDownvoteShare Job
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The Mechanical Simulation Engineer for semiconductor packaging will provide simulation results to analyze the design, consult concerning packaging problems and improvements in the package design, and also respond to customer / client requests or events at they occur.
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Experience with packaging processes: Wafer Back-grinding, Wafer Dicing, Die Attach, Wire-bonding, Molding, and Package Singulation. We have partnered with a semiconductor manufacturing firm in the San Jose, CA area to provide them with a Senior Staff Packaging Engineer.
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Senior Engineer, Advanced Packaging Feasibility Layout Design provide project management, package design/development and sustaining support for integrated circuit or semiconductor assemblies, various other electronic components and/or completed units.
$82,096 - $188,800 a yearFull-timeExpandApply NowActive JobUpdated Today - UpvoteDownvoteShare Job
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At least BSc in related engineering discipline; MS or PhD in EE with emphasis on advanced packaging or RF design is a plus. Own end-to-end RF module and system-in-package (SiP) development for embedded and consumer products from concept to mass production.
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Work closely with IC design teams to define package design rules and define packages to meet their requirements. Responsible for defining substrate/package design rules, process flow and material set for new automotive power module packages.
Up to $195,000 a yearFull-timeExpandApply NowActive JobUpdated Today - UpvoteDownvoteShare Job
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The Advanced Packaging team within AO is responsible for Package Design and various Product Packaging process steps, including wafer scale heterogenous integration and component level packaging, while working closely with our module and line card Packaging teams.
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Preferred experience: Allegro Package Designer (APD) experience to view, edit or verify designs for optimization iterations and package sign-off. Experience of using circuit and system level analysis tools (such as Keysight ADS) to drive chip + package + PCB simulation, optimization and sign-off (ERL, eye-diagram, transient response, etc.
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Working knowledge of Cadence Allegro Packaging Design (APD) It is critical to understand manufacturing design rules, Signal Integrity and Power Integrity requirements to minimize package iterations and create working designs for large substrates with high-speed applications.
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Marvell Semiconductor, a global leader in the development and production of high-performance semiconductor technology, is seeking a seasoned Principal Packaging Engineer to join our team in Santa Clara, CA. This role is pivotal for driving innovation and excellence in our packaging engineering processes and outcomes.
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You'll drive chip packaging signal and power implementations to meet chip, package, and system electrical requirements. As a Signal Integrity/Power Integrity Engineer you will be responsible for the chip package design with signal/power integrity simulation and characterization in the chip, package, and system level.
ExpandApply NowActive JobUpdated 16 days ago - UpvoteDownvoteShare Job
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Lead troubleshooting and problem-solving efforts related to packaging design and process issues, implementing robust solutions to prevent recurrence. Contribute to the intellectual property portfolio of the company through innovation and patent generation in the field of semiconductor packaging.
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The Optical Packaging Engineer is to lead optical package development from ideation to prototype and production for high performance interconnect project. The Optical Packaging Engineer needs to work closely with fab, assembly, substrate, connector partners, and collaborate with multi-functional teams with in AMAT and define optical package requirements.
$160,000 - $220,000 a yearFull-timeExpandApply NowActive JobUpdated Today
package packaging jobs in Santa Clara, CA
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