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A Principal Digital Verification Engineer will define and lead the development of the Digital Verification framework and infrastructure of complex digital and mixed-signal ICs utilizing leading edge technologies with industry standard ASIC tools.
$180,000 - $230,000 a yearFull-timeExpandApply NowActive JobUpdated Today - UpvoteDownvoteShare Job
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You will be in the Silicon One development organization as an ASIC design verification engineer in San Jose, CA. You collaborate closely with verification engineers, designers, hardware and cross functional teams to verify the ASIC in simulation, in emulation and during ASIC bring up.
$150ExpandApply NowActive JobUpdated Today - UpvoteDownvoteShare Job
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This is a role for a versatile engineer that includes RTL design, verification, Emulation/FPGA partitioning and implementation, and lab based bringup of the SoC/GPU chips. + Extensive design verification experience (RTL, Emulation, or Prototyping.
$232,000 - $356,500 a yearFull-timeExpandApply NowActive JobUpdated Today - UpvoteDownvoteShare Job
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They are looking for a Principal ASIC Design Verification Engineer who is an expert with PCIe and CXL to help them accelerate AI cloud computing. As a Design Verification Engineer with this company you will work with test bench development using System Verilog and UVM as well as develop comprehensive test plans and cases with functional coverage, assertions, and coverage properties.
$220,000 - $250,000 a yearFull-timeExpandApply NowActive JobUpdated 13 days ago - UpvoteDownvoteShare Job
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The successful candidate will be responsible for leading the insertion and verification of MBIST and IOBIST. The candidate would be required to work on various phases of SoC MBIST and IOBIST related activities for Broadcom APD (ASIC Products Division)s designs DFT MBIST Architecture, MBIST Test insertion and verification, Pattern generation, Post silicon debug and yield improvement to meet the product test metrics.
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As a member of the mixed signal team, the candidate's work encompassing the development of the state of the art mixed signal IP for SOC including SerDes, PLL, DDR PHY, MIPI PHY, candidate will have exposure to a broad range of IP design phases, including analog circuit level transistor design, IP top level mixed-mode modeling, digital system RTL design, verification, synthesis, STA analysis, simulation and verification in mixed-signal IC environment.
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The Signal Integrity Engineer will play a critical role as the subject matter expert in the planning of digital PCB designs, simulation, lab verification, and troubleshooting signal integrity issues on completed designs.
$166,000 - $229,000 a yearFull-timeExpandApply NowActive JobUpdated 6 days ago - UpvoteDownvoteShare Job
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This is driven by a world-class vertically integrated engineering team spanning RF/Analog architecture and design, Systems/PHY/MAC architecture and design, VLSI/RTL design and integration, Emulation, Design Verification, Test and Validation, and FW/SW engineering.
$150ExpandApply NowActive JobUpdated Today - UpvoteDownvoteShare Job
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Significant Experience with standard ASIC Verification flow/software tools. Rambus, a premier chip and silicon IP provider, is seeking to hire an exceptional Principal Verification Engineer to join our Memory Interconnect Design team in San Jose, California.
$129,300 - $240,100 a yearFull-timeExpandApply NowActive JobUpdated Today - UpvoteDownvoteShare Job
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Core DFT skills for this position should include some of the following: Streaming Scan Network (SSN), Scan compression and insertion, Memory BIST and repair scheme implementation, Logic BIST, JTAG/IJTAG, at-speed test, ATPG, fault simulation, back-annotated gate level verification, silicon debug, memory and scan diagnostics.
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Work closely with chip architecture, design verification, physical design, DFT, and power teams to achieve tapeout success on designs – generally bridging the RTL and place and route. Execute low power design and physical synthesis, deploying knowledge of unified power format and power intent verification.
$170,000 - $230,000Full-timeExpandApply NowActive JobUpdated Yesterday - UpvoteDownvoteShare Job
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Requirements Responsibilities: Take ownership of technical responsibilities in the development of integrated circuits, including circuit design (primarily digital, some analog), simulation, layout supervision and verification, preparation of test plans, product characterization, and documentation.
$80,000 - $137,000 a yearFull-timeExpandApply NowActive JobUpdated Today - UpvoteDownvoteShare Job
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The company is seeking a Lead ASIC Verification Engineer to spearhead the verification of their Beam Steering Mixed Signal ASIC controllers. Lead ASIC Verification Engineer. Lead the verification process for Beam Steering Mixed Signal ASIC controllers.
Full-timeExpandApply NowActive JobUpdated 17 days ago - UpvoteDownvoteShare Job
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At European Recruitment we are working alongside a widely successful Bosch, Continental and BMW backed startup with locations in the US and Europe to help them bring on board a senior ASIC verification engineer.
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Senior ASIC Verification Designer in San Jose, United States. 8+ years of experience in ASIC/FPGA verification including writing verification test plans, verification environment development behavioral model development and test case writing.
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