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High speed design, Analog/Mixed circuits, Power, Compliance testing, Orcad, Allegro, Signal integrity, Power integrity. Title: Hardware Design Engineer. With its strong 55-year heritage and deep industry expertise, Capgemini is trusted by its clients to address the entire breadth of their business needs, from strategy and design to operations, fueled by the fast evolving and innovative world of cloud, data, AI, connectivity, software, digital engineering and platforms.
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Experience with Python, Perl, Tcl, and shell scripts 4+ years of experience in RTL design using Verilog, SystemVerilog Experience in synthesis, timing closure for FPGA and/or ASICs Experience with front-end design and integration tasks including lint, CDC, synthesis, and developing timing ECOs. BSEE or MSEE, with experience in ASIC development and/or FPGA prototyping Ability to work independently, and proactively identify and resolve issues.
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1+ years of Knowledge of enterprise-level security and networking design and configuration (physical and topology, IP structures and ranges, switch interconnectivity, VLAN, bandwidth calculation.
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This is a PCB Design Engineer position who will be a part of our global hardware engineering design team, playing a critical role in ensuring the highest product quality standards and driving continuous improvement for Ring and Blink products.
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Design certification (for example, IDEOU - Foundations in Design Thinking Certificate), Driving product development in a user experience area, Master's degree in UI/UX Design, Interactive and Visual Design, Product Design, or related area, Related industry experience (for example, retail, supply chain, eCommerce, healthcare), UI/UX, Interactive and Visual Design, Electronics Art, Multimedia Design, or related area.
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Customized semiconductor device package design. Analog and mixed signal circuit (detector signal conditioning circuit) design at both chip and PCB level. Customized semiconductor device (especially customized electron detection device) design and simulation, performance optimization, and simulation model building.
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As Associate Battery Engineer, you’re helping push the limits of lithium-ion cell design using Anthro’s state-of-the-art polymer electrolytes. The Associate Battery Engineer will be responsible for the design, fabrication and testing of novel prototype batteries.
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Knowledge of the entire ASIC design flow from RTL integration through synthesis, static timing analysis, scripting, P&R to tapeout. This is driven by a world-class vertically integrated engineering team spanning RF/Analog architecture and design, Systems/PHY/MAC architecture and design, VLSI/RTL design and integration, Emulation, Design Verification, Test and Validation, and FW/SW engineering.
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The position will consist of two six-month rotations with detailed, hands-on training in Cadence applications used for Digital Design/Simulation, Physical Design, Analog Layout, Advanced Verification and/or Hardware Emulation.
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As a NFC Hardware Design Engineer, you will contribute to the architecture, design, and implementation of next generation NFC solutions in established as well as new product categories. Solid understanding of NFC systems including: NFC theory of operation (especially active load modulation), NFC circuit design, NFC antenna design considerations, EMVCo specs, etc.
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Experience in deep sub-micron process design experience in CMOS Analog / Mixed Signal Circuit Design. Background with design and verification tools (Cadence's IC design environment, analog circuit simulation tools like HSpice, Finesim, XA.
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A) The PCB design candidate will produce PCB designs, schematics, and work closely with layout engineers to fabricate printed circuit boards. E) Design includes power distribution, interconnection diagrams, safety interlocks and supporting hardware, computers, data storage, wired or fiber optic networking, and cabling to connect it all together.
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Our team has extensive experience in GNSS system architecture, multipath, signal processing, ASIC design and AI/machine learning, and has collectively filed over 200 career GNSS patents. Strong proficiency in VHDL or Verilog for RTL design.
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Candidate must be able to work with self-motivation and deliver on commitments with challenging schedules, lead design teams through various phases of ASIC design process including RTL design, chip level verification, coverage analysis, synthesis and STA. Candidate must possess solid knowledge in SOC design techniques, analog IPs, high speed IO protocols, CPF/UPF power design flow and lint/CDC tools.
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As a leading consulting engineering firm, we provide thoughtful engineering design that is technologically forward thinking, innovative, and environmentally conscious, ensuring that our contribution to our built environment is flexible, sustainable, and lasting across all the market segments we serve.
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design thinking jobs Company: Genesis Corp New Journey Ai Llc in Milpitas, CA
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