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ASIC Engineering Technical Leader
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- With ~2,100 employees across 16 countries, we design the networking hardware for Enterprises and Service Providers of various sizes, the Public Sector, and Non-Profit Organizations across the world.
- You will be in the Silicon One development organization as an ASIC Implementation Technical Lead in San Jose, CA with a primary focus on Design-for-Test. You will work with Front-end RTL teams, backend physical design teams to understand chip architecture and drive DFT requirements early in the design cycle.
- You will help lead to drive the DFT and quality process through the entire Implementation flow and post silicon validation phases with additional exposure to physical design signoff activities.
- Work with the team on Innovative Hardware DFT & test strategy aspects for new silicon device models, bare die & stacked die, driving re-usable test and debug methodologies and standards
- You are an ASIC Design for Test Hardware Engineer with 7+ years of related work experience with a broad mix of technologies.
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