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Familiarity with DFT, hardware testing methods and tools Working knowledge of Server OSes (Linux, Windows Server) Familiarity with High speed circuit testing (oscilloscope and JBERT usage) Preferred Qualifications Experience with signal integrity and power delivery network is a plus #LI-LM1 #LI-HYBRID At AMD, your base pay is one part of your total rewards package.
Full-timeExpandApply NowActive JobUpdated 2 days ago - UpvoteDownvoteShare Job
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Understanding of Design to Cost (DTC+), Design for Manufacturing (DFM), Design for Test (DFT) The Computing Products Department (CPD) has an opening for a Sr. Principal Electrical Engineer. The Sr. Principal Electrical Engineer role also has opportunities for project engineering and control account management (PE/CAM), and has high expectations for leadership within a design team, and communication with internal and external customers.
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Digital Force Technologies (DFT) is a defense technology provider with a 20-year history of developing and fielding advanced sensor systems, force protection solutions, and tactical surveillance products.
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Knowledge of DFM/DFT for printed circuit assemblies. Knowledge of appropriate practices for successful design of mixed signal printed circuit board designs including signal integrity, grounding, EMC, and power distribution.
ExpandApply NowActive JobUpdated 9 days ago - UpvoteDownvoteShare Job
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You have experience with all stages in the ASIC design flow including emulation, prototyping, DFT, timing analysis, floor planning, ECO, bringup & lab debug, and ATE test development. You have experience with all stages in the ASIC design flow including emulation, prototyping, DFT, timing analysis, floor planning, ECO, bringup & lab debug, and ATE test development.
$124,000 - $247,250 a yearFull-timeExpandApply NowActive JobUpdated 2 days ago - UpvoteDownvoteShare Job
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Understanding of ASIC test methodologies, including DFT, scan insertion, memory BIST, and others is a plus. Prepare microarchitecture and RTL for digital logic of the wireless MAC based on a set of functional requirements - Participate in HW/SW partitioning discussions with the SW and FW engineering teams - Work with physical design, DFT, Power and CAD teams to complete and deliver completed MAC IP for SoC integration.
ExpandApply NowActive JobUpdated 3 days ago - UpvoteDownvoteShare Job
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Provide technical guidance and subcontractor oversight throughout SoC design process to include, supervising design activities (RTL, DFT, physical design, verification), integration (packaging), and test (test application/demo.
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5+ years of meaningful experience with all stages in the ASIC design flow including functional and formal verification, emulation, DFT, synthesis & timing analysis, power estimation and ECO. 5+ years of meaningful experience with all stages in the ASIC design flow including functional and formal verification, emulation, DFT, synthesis & timing analysis, power estimation and ECO.
$124,000 - $247,250 a yearExpandApply NowActive JobUpdated 2 days ago - UpvoteDownvoteShare Job
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Review and implement design for manufacturing (DFM) and design for test (DFT) objectives. Perform typical RF design engineering functions, including schematic design and capture, design review, supervision and review of PCB design and layout.
ExpandApply NowActive JobUpdated 7 days ago - UpvoteDownvoteShare Job
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Drive advancements in DFT and DFM methodologies. A working understanding of MEMS or semiconductor device physics and fabrication. Demonstrated ability to investigate, find root cause, and implement appropriate corrective actions using statistical data analysis methods across a broad range of disciplines including device physics, fabrication, test methods, product specifications and product reliability.
ExpandApply NowActive JobUpdated 5 days ago - UpvoteDownvoteShare Job
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This includes power, digital, analog, and RF signals across multiple dieSupport high-speed, multi-layer packaging, high-density interconnects (HDI), blind and buried vias, ball grid arrays (BGAs), RF, design for test (DFT), impedance calculations, cross talk, differential pairs, PCB stack-ups, PCB via structures, electromagnetic compatibility (EMC), material studies/selection, etc.
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Hands-on expert with High-Speed PCB Design and productizing: schematics capture, placement, layout (supervision); PCB/PCBA, BOM, Components; DFT/DFM; PCB Bring-up, Debugging, validation firmware integration; troubleshooting, customer support Failure Analysis (FA/RMA), sustainability; FCC regulatory, EMI complianceExcellent knowledge and hands-on expertise with High-speed ASIC SerDes technology and interconnects; SerDes IP (PAM-4, NRZ) characterization, product integration and certification.
$60 - $80 an hourExpandApply NowActive JobUpdated 2 days ago - UpvoteDownvoteShare Job
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The successful candidate will be responsible for leading the insertion and verification of MBIST and IOBIST. The candidate would be required to work on various phases of SoC MBIST and IOBIST related activities for Broadcom APD (ASIC Products Division)’s designs – DFT MBIST Architecture, MBIST Test insertion and verification, Pattern generation, Post silicon debug and yield improvement to meet the product test metrics.
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Tasks may include Architecture / micro-Architecture; Logic Design; RTL integration and coding; Lint/CDC/DFT checks; Synthesis & supporting timing-closure; Contribute to and support Verification; Supporting Firmware and FPGA teams; Silicon bring-up.
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Experience in writing verilog/system verilog RTL related to DFT logic design. The team that built the innovative Silicon IP AZ1 Neural Edge that is powering the latest generation of Echo devices is looking for a Senior DFT Engineer to continue to innovate on behalf of our customers.
$127,300 - $247,600 a yearFull-timeExpandApply NowActive JobUpdated 3 days ago
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