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Senior IC Layout (FinFET) Designer
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- Headquartered in Chandler, Arizona, Everspin Technologies (Nasdaq: MRAM) is the worldwide leader in designing, manufacturing, and commercially shipping discrete and embedded Magnetoresistive RAM (MRAM) into markets and applications where data persistence and integrity, low latency, and security are paramount.
- Reporting to the VP of Engineering, and based in our Austin, Texas location, the IC Layout Design Engineer will work closely with circuit designers to generate topological layouts of high-performance, cutting-edge memory products.
- Work closely with circuit designers to complete the physical layout and verification of high-performance analog/mixed-signal CMOS Integrated Circuits using Cadence Virtuoso XL Layout and PVS Verification tools in FinFET technologies.
- Associates or higher degree in Electronic/IC layout CAD specialization or related program.
- 5+ years experience in IC layout design in FinFET node product silicon.
Expired 8 days agoInactive Job
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