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In this highly visible role you will be working on various ASIC products for the next generation of optical and electrical data center connectivity products. BSc in Electrical Engineering or Computer Engineering with 8+ years of experience in ASIC Design Verification or MS in Electrical Engineering or Computer Engineering with 6+ years of experience in ASIC Design Verification.
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They are looking for a Senior/Principal ASIC Design Verification Engineer who is an expert with PCIe and CXL to help them accelerate AI cloud computing. Acceler8 Talent has recently partnered with a leading startup specializing in next-generation interconnect technologies designed for the future of HPC and AI applications.
$220,000 - $250,000 a yearFull-timeExpandApply NowActive JobUpdated 9 days ago - UpvoteDownvoteShare Job
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Experience with Python, Perl, Tcl, and shell scripts 4+ years of experience in RTL design using Verilog, SystemVerilog Experience in synthesis, timing closure for FPGA and/or ASICs Experience with front-end design and integration tasks including lint, CDC, synthesis, and developing timing ECOs. BSEE or MSEE, with experience in ASIC development and/or FPGA prototyping Ability to work independently, and proactively identify and resolve issues.
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Software for embedded real-time OS environment- Design the rate-control algorithm and quality analysis for transcoding- Conduct ASIC firmware bring-up on different simulation platforms, including palladium/Haps/FPGA.- Cooperate to support different bytedance business, including LIVE/VOD/RTC/Picture processing, etc.
$187,040 - $358,000 a yearExpandApply NowActive JobUpdated Today - UpvoteDownvoteShare Job
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Solid knowledge and experience working through the entire Digital Design Flow: Specification definition, RTL Verification, Synthesis, P&R, Gate-Level Verification, Power Estimation, ATPG Generation and Simulation, AMS Sims, etc.
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Provide leadership to the ASIC design team to safeguard the success of the ASIC designs. Design analog ASIC circuits, including TIA, Pulser, ADC etc. You will architect the state-of-art acoustic sensing systems and design the ASIC chips to realize them.
$180,000 - $250,000 a yearExpandApply NowActive JobUpdated Today - UpvoteDownvoteShare Job
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Must be familiar with the design process of building systems for data center and mission critical projects. Data Center Construction Project Manager- Owner's Rep Portland, OR.
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Our customers include the leading service providers, data center operators, internet content providers (ICPs), cable operators, enterprises, and government agencies worldwide, including 9 of the top 10 Tier 1 service providers and 6 of the top 7 ICPs. We design, develop and deliver hardware and software for fiber-based connectivity solutions that span access, aggregation, metro, long haul, and submarine network.
$130,900 - $243,100 a yearFull-timeExpandApply NowActive JobUpdated Today - UpvoteDownvoteShare Job
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You will work with other Acacia mixed-signal engineers to collaborate in order to provide an optimized design that will integrate into the ASIC. In addition, you will have the opportunity to interact with other Acacia groups including digital/DSP design, system design, package design, and module design.
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Lumentum's commercial lasers enable advanced manufacturing techniques and diverse applications including next-generation 3D sensing capabilities. Lumentum's optical components and subsystems are part of virtually every type of telecom, enterprise, and data center network.
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We are seeking a Lead Analog Circuit Design Engineer to lead the next generation development of analog control electronics for the Light Control Metasurface (LCM) beam forming chips.
$180,000 - $220,000ExpandApply NowActive JobUpdated Today - UpvoteDownvoteShare Job
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Your responsibilities will be wide-ranging and and run the gamut of working closely with design engineers to stay abreast of the specification and implementation of ASIC blocks, developing comprehensive test and coverage strategies, implementing the verification environment and tests using object-oriented tools, in particular System Verilog and UVM, handling bug tracking and coverage convergence and developing scripts and methodologies for the front-end ASIC flow.
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Big Data, Cloud Storage, Data Center Storage, HDD, Helium HDD, Backup Recovery, Data Federation, Virtualization, Personal Storage, Cloud Computing, SQL on SSD, SQL Data Storage, VDI, Flash Memory Storage, NVMe, Memory Card, Embedded Storage, USB Storage, SSD, Object Storage, Software, Storage Solutions, and Data Technology.
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We are looking for a strong Mechanical Design Engineer to design and deliver next generation networking products such as routers, switches, firewalls, and or servers that meets system product requirements.
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The successful candidate will be responsible for leading the insertion and verification of MBIST and IOBIST. The candidate would be required to work on various phases of SoC MBIST and IOBIST related activities for Broadcom APD (ASIC Products Division)s designs DFT MBIST Architecture, MBIST Test insertion and verification, Pattern generation, Post silicon debug and yield improvement to meet the product test metrics.
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data center asic design next generation jobs in San Jose, Iselin, New Jersey
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