Infinera, Corporation

Our customers include the leading service providers, data center operators, internet content providers (ICPs), cable operators, enterprises, and government agencies worldwide, including 9 of the top 10 Tier 1 service providers and 6 of the top 7 ICPs. We design, develop and deliver hardware and software for fiber-based connectivity solutions that span access, aggregation, metro, long haul, and submarine network.. Title: Staff ASIC Design Engineer. Solid ASIC design (micro-architecture/implementation) and debugging skills. Experience in encryption, forward error correction, or digital signal processing is a plus. Good knowledge of ASIC design flow/tools, with backend knowledge being a great asset

asic design engineer

CA Pay Range (Annual): $130,900.00 - $243,100.00 At Infinera, your base pay is one part of your total compensation package. Your actual base pay will depend on your skills, qualifications, experience, and location. This role may be eligible for equity grants, discretionary bonuses, or commission payments. The amount of these incentives is based on the terms of the Company's incentive plans, the Company's financial performance, and/or individual employee job performance. Infinera also offers paid leave, medical, dental, and vision coverage, 401(k), life, and disability insurance and to eligible employees. Infinera is the global supplier of innovative networking solutions. Our customers include the leading service providers, data center operators, internet content providers (ICPs), cable operators, enterprises, and government agencies worldwide, including 9 of the top 10 Tier 1 service providers and 6 of the top 7 ICPs. We design, develop and deliver hardware and software for fiber-based connectivity solutions that span access, aggregation, metro, long haul, and submarine network. Our industry-leading, trendsetting edge-to-core solutions provide the foundation for many of the world's largest and most demanding networks that generate billions in service revenue for our customers. Title: Staff ASIC Design Engineer Location: San Jose, CA Responsibilities •Control subsystem development in large mixed signal ASICs •Work with system architect to define control plane spec / micro-architecture and RTL development •Design size/timing/power optimization via micro-architecture/RTL/Synthesis •Layout support for quality final product and TTM Requirements •Electrical/Computer Engineering is a must; higher degrees preferred; Fresh Masters graduates are welcome to apply. •Solid ASIC design (micro-architecture/implementation) and debugging skills •Experience in Verilog / SystemVerilog design and IP integration •Strong problem-solving skills •Experience in embedded microprocessor design, ARM Processor architecture and AMBA AHB/AXI/APB bus protocols preferred •Experience in external interfaces such as memory, flash interfaces, SPI, UART, I2C etc. is a plus . Experience in Ethernet, packet, ONU/ONT, PON network is a plus . Experience in encryption, forward error correction, or digital signal processing is a plus •Good knowledge of ASIC design flow/tools, with backend knowledge being a great asset •Working knowledge of scripting languages like PYTHON and PERL, and C/C++/Assembly programming •Good verbal/written communication skills and teamwork #LI-SR2 Infinera is an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to race, sex, color, religion, sexual orientation, gender identity, national origin, disability status, protected veteran status, or any other characteristic protected by law. Infinera complies with all applicable state and local laws governing nondiscrimination in employment.

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