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Have a deep understanding of Verilog or SystemVerilog, logic design and circuit modeling for mixed-signal blocks. Proven experience with custom digital circuit design and adaptation algorithms, such as DFE, CTLE, CDR, and offset cancellation.
$156,000 - $287,500 a yearFull-timeExpandApply NowActive JobUpdated Today - UpvoteDownvoteShare Job
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We lead discussions with multi-functional teams (e.g., architecture, SIPI, packaging, board design, DFT, ESD) to create and drive block-level specifications, mixed-signal implementations and behavioral modeling.
$170,700 - $300,200 a yearExpandApply NowActive JobUpdated 2 days ago - UpvoteDownvoteShare Job
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Design components and create detailed mechanical drawings for various volume manufacturing processes, including machined, cast metal, injection molded plastic, sheet metal stamped, etc. As a pivotal member of Celestial AI, you will play a crucial role in the design and improvement of components for large-scale manufacturing, driving process enhancements to propel our productization initiatives.
$150,000 - $180,000 a yearFull-timeExpandApply NowActive JobUpdated Today - UpvoteDownvoteShare Job
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They are looking for a Senior/Principal ASIC Design Verification Engineer who is an expert with PCIe and CXL to help them accelerate AI cloud computing. As a Design Verification Engineer with this company you will work with test bench development using System Verilog and UVM as well as develop comprehensive test plans and cases with functional coverage, assertions, and coverage properties.
$220,000 - $250,000 a yearFull-timeExpandApply NowActive JobUpdated Today - UpvoteDownvoteShare Job
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Work together with the hardware and embedded software engineer to design FPGA Firmware for high-performance mixed-signal systems. The individual needs solid knowledge and experience with HDL(Systemverilog, Verilog, VHDL), Xilinx FPGA design tools, Electrical test equipment, and Python script for testing.
$103,000 - $175,100 a yearFull-timeExpandApply NowActive JobUpdated Today - UpvoteDownvoteShare Job
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Hands on large body size, high power, high speed substrate design using Cadence APD/SIP. Package planning and integration with die, package, and PCB design teams. Join a world-class team of silicon and distributed systems experts at Enfabrica as a Package Design Engineering Lead. You have the opportunity to be part of building a groundbreaking new category of products that revolutionize the performance and scalability of next-generation AI and accelerated computing systems, and to help solve key infrastructure challenges facing our customers.
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Strong interpersonal and communication skills to work across different domains of ASIC design, collaborate and work with Arch, RTL, DFT, and physical design teams. Apply knowledge and gain experience in ASIC design including RTL and logic design, physical and circuits design, and timing and power convergence.
$164,000 - $304,750 a yearFull-timeExpandApply NowActive JobUpdated 2 days ago - UpvoteDownvoteShare Job
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PhD in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience. The candidate will work hands-on and own their design through the full ASIC development process from specification, RTL implementation, verification, synthesis, timing closure, emulation and post silicon bring up.
$165,000 - $247,000 a yearFull-timeExpandApply NowActive JobUpdated 1 month ago - UpvoteDownvoteShare Job
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Experience: Minimum 5+ years of experience in Analog IC Design, with some experience in high voltage AC/DC technical aspects preferred. Strong understanding of digital design, RTL synthesis, Verilog AMS, SystemVerilog, and familiarity with analog circuit blocks and device physics.
$80,000 - $137,000 a yearFull-timeExpandApply NowActive JobUpdated Today - UpvoteDownvoteShare Job
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Skills Strongly Desired – SoC Architecture experience Experience and domain-knowledge in at least 2-3 of these: CPU (preferably, ARM and/or RISC-V), or GPU, or DSP; SoC Memory hierarchy; NoC/Fabric; low-power design and verification; high-speed peripheral interfaces such as CSI, HDMI/DP, I3C, USB, PCIe; Machine-learning / AI; FPGA.#Pando.
$150,000 - $220,000 a yearFull-timeExpandApply NowActive JobUpdated Today - UpvoteDownvoteShare Job
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Samsung Interface Lab (SIL) is looking for a senior analog design engineer with experience in high-speed I/O design. Solid background in mixed-signal circuit design, and in particular past experience with PLL, DLL, CDR, DFE, TX, or analog front-end (AFE/CTLE.
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Under the direction of the Sr. Manager of Design Integration, the Design Integration Engineer is responsible for the mask design and layout of thin film recording heads, including tracking wafer schedules, providing mask design requirements for new or existing wafers, and managing the communication between fab expeditors and design integration to minimize wafer holds.
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3-5 years of experience as a UX writer, product content strategist, content designer, growth writer or a similar role. Solid understanding of user experience design principles and interaction patterns.
$101,000 - $152,000 a yearFull-timeExpandApply NowActive JobUpdated 13 days ago - UpvoteDownvoteShare Job
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Experience in several of these areas is desirable: opto-mechanical systems, ultra-high vacuum systems, design of inspection equipment or similar instruments, motion controls, electronics, data acquisition systems such as Labview, measurement instrumentation, tooling & test fixture design, supplier management, new product introductionExperience in thermal, structural, and fluid flow modeling and analysis (Pro/Mechanica, ANSYS, CF Design skill strongly preferred.
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Knowledge of protective packaging design (Includes crating, foam and corrugated products) SIGMA DESIGN has collaborated with a packaging and crating company seeking an experienced Packaging Design Engineer to join their facility in San Jose, California.
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Title: ux design Company: Club in Santa Clara, CA
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