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We are now looking for a Senior ASIC Design Engineer for Memory Controllers. As a member of our Memory Subsystem Design team, you will collaborate with architects, software engineers, and circuit designers to and deliver a world-class solution.
$124,000 - $247,250 a yearFull-timeExpandApply NowActive JobUpdated Today - UpvoteDownvoteShare Job
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PhD in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience. Master's degree in Science, Engineering, or related field and 5+ years of ASIC design, verification, validation, integration, or related work experience.
$165,000 - $247,000 a yearFull-timeExpandApply NowActive JobUpdated 6 days ago - UpvoteDownvoteShare Job
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You will work closely with the Architecture, Verification, ASIC Design and Software teams, and report into the Engineering organization. KEY RESPONSIBILITIES Help set up FPGA/Emulation platform (Synopsys HAPS) and device modelingHelp set up FPGA/Emulation debugging toolsHelp modify the SoC design for the FPGA platform; Duties include modeling, debugging, verification and SW support Work with SoC design engineers, verification team, systems team and software engineering to perform early prototyping, debug issues and identify fixes; and Support test program development, chip validation, and chip life until production maturity.
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A minimum 5 years of experience in Emulation, Prototyping or FPGA design and verification using System Verilog/Verilog/VHDL. Port ASIC and IP RTL code to prototyping and emulation platforms ( Zebu/HAPSs, Palladium/Protium.
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Knowledge of the entire ASIC design flow from RTL integration through synthesis, static timing analysis, scripting, P&R to tapeout. This is driven by a world-class vertically integrated engineering team spanning RF/Analog architecture and design, Systems/PHY/MAC architecture and design, VLSI/RTL design and integration, Emulation, Design Verification, Test and Validation, and FW/SW engineering.
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This role will include participation in cross-functional teams such as those with a focus on facility design, chemical and electrochemical engineering, I&C and software engineering, process modeling, quality assurance, and licensing.
$80,000 - $155,000 a yearFull-timeExpandApply NowActive JobUpdated Today - UpvoteDownvoteShare Job
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In this position, you will get the opportunity to build complex GPU and Tegra chips and interact directly with unit-level ASIC, Physical Design, CAD, Package Design, Software, DFT and other teams.
$124,000 - $345,000 a yearFull-timeExpandUpdated Today - UpvoteDownvoteShare Job
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ASIC Design Engineer. Senior IC Layout Design Engineer page is loaded. Senior IC Layout Design Engineer. Layout design of high precision analog / mixed signal circuits subject to multiple constraints.
$106,800 - $178,000 a yearFull-timeExpandApply NowActive JobUpdated Today - UpvoteDownvoteShare Job
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Work with SoC design engineers, verification team, systems team and software engineering to perform early prototyping, debug issues and identify fixes; and. As the FPGA Engineer for the team, you will have the opportunity to work in design verification, debug and system integration.
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Design, develop, and maintain data infrastructure software using Python and Go (familiarity with GraphQL a plus)Implement and manage DevOps processes for Data Engineering toolsUse Docker and Kubernetes to build and deploy containerized applications.
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We are seeking a motivated, proactive, and intellectually curious engineer who will work alongside world-class cross-disciplinary teams (systems, firmware, architecture, design, validation, product engineering, ASIC implementation.
$170,000 - $230,000Full-timeExpandApply NowActive JobUpdated Today - UpvoteDownvoteShare Job
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To support our engineering operation, we are hiring a Senior Package Design Engineer with extensive experience of complex ASIC package design in Cadence APD, with SI/PI background a plus.
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Demonstration of analysis and design implementation in adjacent disciplines such as ASIC design, FPGA Applications and/or Systems Engineering, may also be acceptable. Microchip is also a pioneer in embedding RiscV processors in FPGAs∯*∯ The successful applicant will work as part a core team that develops future FPGA architectures, including programmable fabrics, IO, hard IP blocks, compute, system interconnect, configuration, security, and collaborates with design & software engineering to successfully architect, develop, verify, and integrate the future products.
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Strong proficiency in independently developing and delivering hardware products as the responsible mechanical design engineer from cradle to grave. Staff Engineer: Bachelor's degree in Mechanical Engineering with 10+ years relevant industry experience OR Master's degree with 8+ years relevant industry experience OR PhD with 4+ years relevant industry experience.
$156,000 - $245,000 a yearFull-timeExpandApply NowActive JobUpdated Yesterday - UpvoteDownvoteShare Job
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Must have at least 4 years of experience in managing ASIC design, integration, or verification teams. The CSG Central Applications Engineering team seeks an experienced and talented SoC Design Manager to lead a new team for CSG systems.
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software engineering asic design jobs Title: solution engineer in Santa Clara, CA
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