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About the Role In the Staff System Engineer role, you will be responsible for leading, designing and delivering enterprise integrations and dashboarding tools to support production reliability (monitoring, alerting, event management, log analysis, APM, collaboration.
$150,000 - $180,000 a yearFull-timeExpandApply NowActive JobUpdated Today - UpvoteDownvoteShare Job
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Under the general direction of the Manager, the Sr Software Test Engineer (internal title) applies quality assurance software engineering and knowledge in the design of test plan, test cases, execution of tests and testing strategies for the validation and quality assessment of software products.
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Sr Software Test Engineer (internal title) The pay range for the Sr Software Quality Assurance Engineer at the CAISO is $48.79 - $81.31 per hour. Responsible for establishing and maintaining the Software Test Automation and Performance Test Engineering code base, integration and security testing posture, assessment of the appropriate level and depth of testing to be applied for the ISOs software releases.
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The Senior Software Engineer, Core Banking, develops backend applications, stored procedures, and scripts, utilizing Oracle PL/SQL and Python, to integrate 3rd party applications with the DNA Core Banking platform, automate business processes, prevent fraud and enhance member and employee experience; while maximizing operational efficiencies in multi-tier environments.
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As Design Automation Engineer within Intel Foundry Service (IFS), you develop, maintain, and enhance analog modeling, simulation, and verification methodology and solutions. With the first "Open System Foundry" model in the world, our combined offerings of wafer fabrication, advanced process, and packaging technology, chiplet, software, robust ecosystem, and assembly and test capabilities help our customers build their innovative silicon designs and deliver full end-to-end customizable products from Intel's secure, resilient and sustainable source of supply.
$123,419 - $185,123 a yearFull-timeExpandApply NowActive JobUpdated Today - UpvoteDownvoteShare Job
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Familiarity with discipline-specific design software (i.e., MicroStation, AutoCAD, Civil 3D, ArcGIS, InRoads, Geopak, GeoSlope, ANSYS, STADD, HEC-RAS, HEC-HMS). WSP is currently initiating a search for an Early Career Environmental Engineer to support our California District.
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The MPE's PCH / GFX Manufacturing (PGM) team is looking for an analog product development engineer. Microsoft software suite (Word, Excel, Outlook) Using PCB Design EDA tools (e.g. Cadence Allegro or Mentor Graphics Expedition) or equivalent.
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Licensure as a professional civil engineer with the Minnesota Board of Architecture, Engineering, Land Surveying, Landscape Architecture, Geoscience and Interior Design (AELSLAGID) or ability to obtain licensure through Comity (Reciprocity.
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This TMS (Traffic Management System) Senior Design Engineer position provides management, support, and coordination within the MnDOT RTMC’s ITS (Intelligent Transportation System) TMS engineering unit by performing expert level technical engineering tasks to prepare detailed project plans; project specifications; and project cost estimates for construction of the TMS network.
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We are searching for a layout engineer who has lead projects and is passionate about improving efficiency through methodology development. Should have hands on experience of Critical Analog Layout design of blocks such as Temperature sensor, PLL, ADC, DAC, LDO, Bandgap, Ref Generators, Charge Pump, Current Mirrors, Comparator, Differential Amplifier etc.
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As an HBM DFT Design Engineer you will work in an innovative and dynamic team and will be responsible for designing and analyzing analog & mixed-signal circuits for DRAM & Interface die. We are looking for a HBM DFT Design Engineer.
$165,000 - $280,000 a yearFull-timeExpandApply NowActive JobUpdated Today - UpvoteDownvoteShare Job
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As a member of a centralized CAD team, you will collaborate with the analog, mixed-signal, and digital design teams within Intel as well as EDA tool vendors to drive and coordinate effort of developing and validating simulation flows, enhancing custom design environment, validating checks, and doing results analysis.
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As an HBM Memory Lead Design Engineer in our DRAM and Emerging Memory Group (DEG), you will be responsible for directing a team that will be crafting and analyzing digital and analog circuits used to develop memory products.
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Serves as the Chief Dam Safety Engineer and oversees the NCPA’s Dam Safety Program. Certification: An active Professional Civil Engineer registration in California is required to fulfill the complete array of job responsibilities.
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Maintain and update the suite of different models and versions across different software platforms available for customers in North America. In-depth knowledge of utility-scale solar and battery storage power plant design is required.
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Title: software engineer Company: Smarttrade in Rocklin, CA
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