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About the Role:The TD/DE EDA Design Flow Development Director reports to VP of Library and SoC Design Enablement and will build a team of CAD experts and developers and will be responsible for planning, execution, delivery of the EDA design flow for all DTCO activities, technology lead vehicle design, IP design, and product design in TD. The design flow will be built on top of a reference flow enabled on Intel technology and released from external EDA vendors.
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We are seeking Intel Analysts OSINT at all levels of experience (Junior thru Senior and SME) to support the United States Army Pacific Command (USARPAC) Task Order (TO). Supports and assists to systematically conduct OSINT research and readiness activities to enhance the Government s awareness, preparedness, and decision-making capabilities through USARPAC in accordance with Army, DoD, and Intelligence Community OSINT Policy.
Full-timeExpandApply NowActive JobUpdated 7 days ago - UpvoteDownvoteShare Job
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Prior Air Force Space Systems Information Assurance (IA) experience including Requirements, Cyber Risk Assessment, Cyber Intel collection, Risk Management Framework (RMF), DIACAP, STIG application, ST&E, IAVM, POAM, IATT and IATO.
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IRCs include Psychological Operations (PSYOP) / Military Information Support Operations (MISO), Combat Camera (COMCAM), Civil Affairs (CA), Public Affairs (PA), Electronic Warfare (EW), Cyber Electro-Magnetic Activities (CEMA), or Special Technical Operations (STO.
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Lead investors include NightDragon, Snowflake, and Databricks, along with additional funding from ServiceNow, Citi Ventures, Dell Technologies Capital, DFJ Growth, IAG, Intel Capital, March Capital, Okta Ventures, StepStone, Ten Eleven Ventures, and Wipro Ventures.
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Provide support to the Security Operations Center during incident response and threat intelligence activities that includes cyber threat analysis support, research, recommending relevant remediation and mitigation.
$101,400 - $183,300 a yearFull-timeExpandApply NowActive JobUpdated 4 days ago - UpvoteDownvoteShare Job
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As the world's largest chip manufacturer, Intel strives to make every facet of semiconductor manufacturing state-of-the-art. Memory pathfinding activities and power, performance, area (PPA) optimization through design technology co-optimization (DTCO) and product design enablement.
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Engage in safety forums and Emergency Response Team activities as required. This position is not eligible for Intel immigration sponsorship. Associate's degree/certification in an equipment-focused program (such as Automotive Maintenance, HVAC, Mechatronics, or Aviation maintenance) AND.
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Desire to work in SOC, Vulnerability Management, Security Information Event Management, Threat Hunt, or Threat Intel teamon a. In this role you will perform key client-facing managed security services activities including identification of assets, scanning for infrastructure and application vulnerabilities, security penetration testing, and security monitoring.
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With key strategic partners like Intel and Equinix, Fortanix customers like PayPal, Google & Adidas are reaping the benefits. Successful candidates will have at least 7 years of experience as an enterprise sales engineer with infrastructure, cloud, or security vendors, and would be accountable for revenue goals driven by innovative technical programs and day-to-day customer facing account-level activities.
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These circuits enable best-in-class memory collateral, IP and innovative product design across all generations of Intel process technology. Technology Development (TD) is the heart and soul of Moore's Law at Intel, enabling Intel to create world-changing technology that enriches the lives of every person on earth.
ExpandApply NowActive JobUpdated 10 days ago - UpvoteDownvoteShare Job
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This role is available as a fully home-based and generally would require you to attend Intel sites only occasionally based on business need. This role may also be available as our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site.
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Internal and external customer engagement to enable optimized usage of Intel memory technology. At Intel, DE is one of the key pillars enabling Intel to deliver winning products in the marketplace.
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Knowledge of EDA tools used for analog, digital and mixed-signal circuit design. Memory bit-cell and complex periphery IC layout and automation. Knowledge of the CMOS ASIC design flow. Custom digital circuit design, simulation, layout design, and verification.
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As the Memory Technology/Design Lead, you will partner with and leveraging domain experts across various areas of technology development, EDA vendors and product design teams to develop and deliver high-quality industry-leading memory technology collaterals and to drive circuit innovations that enable next generation high-performance, high-density, low-power embedded memory designs on Intel's advanced CMOS process technologies.
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