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Senior VLSI Integration Engineer
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- Implement Chip level design through collaboration with cross-functional teams (Functional Design, DFT, Design Verification, System Verification, STA, and Physical Design).
- Including functional debug, getting ready for physical design, emulation, resolve design quality issues.
- Daily work involves aspects of chip level design, including partitioning, CDC, RDC, trial synthesis, design quality checks
- Solid hands-on RTL design skills in System-Verilog
- Passion for quality and readiness to physical design, emulation, firmware and other customers
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