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RTL Design Engineer - Memory Controller
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Full-time
- Configurable for many different applications, System IP is the right choice for your system whether it is a high-efficiency IoT endpoint or a high-performance server SoC.
- The collection of silicon proven interconnects, security IP, system controllers, debug and trace and IP tooling are all designed, validated and optimized to be used with Arm Cortex processors and Arm Mali Multimedia IP. Built upon the open AMBA interface standard, Arm System IP provides design teams with the foundation for building better systems.
- As an RTL Design Engineer, you would responsible for one or more functional units of the Memory Controller while working closely with performance modeling, validation, and implementation teams to meet all functional requirements and performance, power, area (PPA) goals.
- Development and implementation of SystemVerilog RTL logic design for sophisticated blocks and functions within the design
- Debug functional and/or performance issues within the RTL using modern simulation and debug tools
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