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RTL Design Engineer CPU & Server Platform
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- RTL Design Engineer CPU & Server Platform
- Work with Research Groups, Platform Engineering teams at all layers of Hardware & Software - from FPGA BS to Firmware to OS (ESXi) to Hypervisors.
- You will have the opportunity to influence external FPGA , Silicon & platform vendors and VMW partners.
- Responsible for Macro & Microarchitecture of the overall FPGA chip and the design, verification, debug of individual IP blocks
- 10+ years of experience in in ASIC & FPGA design & debug
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