Softworld, a Kelly Company

As a Digital Design Engineer, you will have a challenging and rewarding opportunity to be a part of our Enterprise-wide digital transformation.. The selected individual will work on FPGA or ASIC Design across the full product life cycle process.. In this capacity, you will utilize your working knowledge of digital design, signal processing and digital interfaces.. Working knowledge of full product life cycle (requirements, design, implementation, and test) of FPGA Design and/or ASIC Design. Knowledge of System Verilog, Verilog and/or VHDL

digital design engineer

Job Title: Digital Design EngineerJob Location: Linthicum, MD 21090Onsite Requirements:<ul><li> Digital design experience</li><li> FPGA</li><li> ASIC32</li></ul>Job Description:Roles and Responsibilities:<ul><li>As a Digital Design Engineer, you will have a challenging and rewarding opportunity to be a part of our Enterprise-wide digital transformation.</li><li>The selected individual will work on FPGA or ASIC Design across the full product life cycle process.</li><li>In this capacity, you will utilize your working knowledge of digital design, signal processing and digital interfaces.</li><li>This candidate will have an ability to operate in a team environment and collaborate across the different teams as required to accomplish the goals.</li></ul>Basic Qualifications:<ul><li>BS in Electrical Engineering or another STEM (Science, Technology, Engineer, Mathematics) discipline</li><li>9+ years of digital design engineering experience</li><li>Working knowledge of full product life cycle (requirements, design, implementation, and test) of FPGA Design and/or ASIC Design</li><li>Knowledge of System Verilog, Verilog and/or VHDL</li><li>S. citizenship is required for all positions.</li><li>An ACTIVE DoD Secret level or higher security clearance and ability to obtain SAP (Special Access Program) clearance</li></ul>Preferred Qualifications:<ul><li>Experience with industry standard FPGA design implementation tools for IP integration, PnR, CDC</li><li>Experience with industry standard ASIC front-end design tools for synthesis, LEC, CDC</li><li>Experience with STA constraints generation and timing closure.</li><li>Experience with MATLAB, Mentor Graphics design tools, Synopsys, or similar tool.</li><li>Familiarity with Xilinx and Intel FPGA technology</li></ul>**3rd party and subcontract staffing agencies are not eligible for partnership on this position. 3rd party subcontractors need not apply. Due to the nature of the work, a United States Government Clearance is required to be eligible for the position. **

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