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DFT Engineer
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$52 - $60 an hour
Full-time
- Stitching multiple scan chains across different IP(mixed signal) and clock domains.
- Provide SoC (top) level constraints and partitions for RTL/Logic designers, floorplan & PD engineers, DFT requirements
- Verify DFT circuitry and interface with other blocks, debug timing simulation issues.
- Be able to work independently and own the complete task from DFT specification to final pattern delivery for sub-system and/or SOC.
- 10+ years of hands-on experience with DFT and test flow with commercial EDA tools (Synopsys, Mentor) for large and complex SoCs.
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