OSI Engineering

This team is seeking to hire an exceptional Director, Analog Engineering to join our Memory Interface Chips team that is being built out at our newest Design Center - Atlanta, Georgia.. Will be responsible for building out the analog design team and possibly the digital and verification teams as well.. Lead and manage a team of analog design engineers at various levels.. Take the lead role in architectural definition of design implementation of various state-of-the-art, high speed and low power analog/mixed-signal DDR PHYs.. MSEE/Ph. D. with 10+ years of analog / mixed-signal circuit design experience.

engineering director

This team is seeking to hire an exceptional Director, Analog Engineering to join our Memory Interface Chips team that is being built out at our newest Design Center - Atlanta, Georgia. Candidates will be joining some of the brightest inventors and engineers in the world to develop products that make data faster and safer. As a Director, Analog Engineering, the candidate will be reporting to the SVP/GM and is a Full-Time position. The candidate will be part of Memory Interface Chips BUs design group responsible for specifying, architecting, executing and productizing leading edge memory interface buffer chips for DDR5, DDR6 and beyond. Will be responsible for building out the analog design team and possibly the digital and verification teams as well. Responsibilities
Lead and manage a team of analog design engineers at various levels.
Main tasks include overall project planning and execution, schedule risk and priority management, providing technical direction and guidance, fostering innovation, performance reviews, team talent development.
Work closely with cross-functional teams across different geographies and time zones to ensure engagement and execution.
Take the lead role in architectural definition of design implementation of various state-of-the-art, high speed and low power analog/mixed-signal DDR PHYs.
Other responsibilities include layout supervision, design documentation, customer interaction and post silicon activity support.
Build and grow a strong team across multiple functions (analog, digital, and verification). Qualifications
MSEE/Ph.D. with 10+ years of analog / mixed-signal circuit design experience. Bachelors degree may also be considered with applicable technical (hands on) experience.
Experience managing and mentoring engineering teams.
Must have direct chip design experience in DDR product.
Memory and/or SerDes background required.
Experience with Verilog coding is a plus, but not required.
Experience with MATLAB Simulink modeling is a plus, but not required.
Knowledge in signal / power integrity is a plus, but not required.
Must be a team player with good written and verbal communication skills, self-motivated, thorough design styles, detail oriented, and work with multiple functional teams with good engineering practices. Type: Fulltime
Location: GA, Atlanta (3 days a week onsite)
Salary range: $200,000-$297,000 by Jobble #J-18808-Ljbffr

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