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Graphics Validation Engineer
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Full-time
- Media IP team is looking for senior technical individual to support Power and Performance validation using simulators as well as hardware emulation platforms like Zebu.
- The Graphics Validation Engineer would be a bridge between Architecture and design teams along with validation pipeline thereby getting exposure of IP development cycle right from the Architecture definition to the product freeze.
- Individual is required to be hands-on to various development and debug activities including emulation model builds, debug capabilities and offerings to fast track Performance And Power validation.
- A good understanding of emulation platforms, transaction level modeling [TLM] in Bus Functional Models [BFMs], low power design, energy estimation, data flow and systematic debug approach is key.
- PhD degree in Computer Science, Electrical Engineering, Computer Engineering or any related STEM degree plus 2+ years of industry work experience.
Expired 9 days agoInactive Job
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