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ASIC Design Engineer - Memory Cache Controller
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$138,900 - $256,500 a year
- ASIC Design Engineer - Memory Cache Controller
- Our high-bandwidth multi-client memory subsystems are blazing new territory with every generation.
- As we increase levels of parallelism, bandwidth and capacity, we are presented with design challenges exacerbated by clients with varying but simultaneous needs such as real-time, low latency, and high-bandwidth.
- In this role, you will work on crafting special purpose cache and controller which is part and parcel of the SOC memory hierarchy
- Experience in PPA (performance/power/area) analysis.
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