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Job Summary: A technology-driven company in Southwest Austin is seeking a Senior FPGA Engineer to design and develop high-performance embedded systems built on SoC and FPGA technology.
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Demonstrated experience with digital design and VHDL or Verilog coding. Designs are implemented using VHDL and support the following type of applications: gigabit serial interfaces, Radio Frequency (RF) and Electro-Optical (EO) Digital Signal Processing (DSP), control loops, data links, embedded processing, and processor interfaces.
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Knowledge of web development technologies (HTML, CSS, JavaScript) and experience in integrating FileMaker solutions with web-based interfaces. Experience in developing and deploying FileMaker solutions on MacOS, Windows, iOS, and the web, with a deep understanding of platform-specific considerations and constraints.
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Basic understanding of RTL, logic design, and digital circuits Python and/or Perl programming desirable. Design knowledge of high-speed I/O SerDes architectures and blocks, plus general mixed-signal IP, e.g. CTLE, FFE, DFE, VGA, CDR, PLL/DLL, TX driver, EMC, GPIO, etc.
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Experience in graphic design, art direction and styling. Develop and articulate clear strategies and guidelines for graphic design and photography/videography.
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Serves on the Ransom Center’s senior leadership team and works collaboratively with the Director, with four Associate Directors (Division of Technical & Digital Collections, Exhibitions & Public Programs, Preservation & Conservation, Curatorial Affairs), and the Finance Manager, Human Resources Manager, Chief Development Officer, Head of Marketing & Communications, and the Facilities Manager to manage resources and advance institutional strategic goals.
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Required Education In accordance with Southern Association of College and Schools Commission on Colleges (SACSCOC) requirements: Bachelor's degree in Fashion Design, Fashion Merchandising, Home Economics (with relevant concentration), or Marketing; or Associate degree in one of these disciplines and 3 years of non-teaching.
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Stay updated on industry trends and best practices in graphic design and digital marketing. We are looking for a talented Graphic Design Intern to join our creative team and contribute to our projects, including PDF illustrations, Pinterest, Instagram, website, email campaigns, and more.
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Develop recommendations for process changes and enhancements to improve design efficiency within Deltek Costpoint. + 7+ years of Deltek Costpoint experience in Manage Subcontracts, Procurement Planning, Purchasing and Supplier Portal Applications.
$187,000 a yearExpandApply NowActive JobUpdated 19 days ago - UpvoteDownvoteShare Job
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As a Digital Design Engineer , you will be part of a collaborative team developing high-performance mixed-signal integrated circuits, including delta-sigma ADC’s and DAC’s, amplifiers, DC/DC converters, and other circuitry in advanced CMOS processes.
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Senior Network Developer (Hyperscale Network Design)Location: United StatesVisa / work permit sponsorship is not available for this positionSupports the design, deployment, and operations of a large-scale global Oracle cloud computing environment (Oracle Cloud Infrastructure - OCI.
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We do this through empowering customers by combining the real and digital worlds. #LI-DRR #RSS hvac controls, building controls, programming, hvac field technician, heating, ventilation, air conditioning, direct digital control, apogee, Desigo, Modbus, Tridium, Niagara, Alerton, commissioning, LonWorks, BACnet, DDC, BMS, building management, mechanical systems, system integration.
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Leading the design and development of Contact Center AI solutions and Conversational AI solutions that improve customer engagement and satisfaction, reduce customer service costs, and increase operational efficiency.
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Strong knowledge of Teamcenter and AWC architecture, including knowledge of its server components such as Database Server, Application Server, Web Server, active workspace gateway, and File repo.
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Requires strong understanding of analog/mixed signal design concepts, CMOS processes, Package architecture and Chip integration on PCB. Closely work with Platform architects and Packaging team for Power Integrity and Power Distribution Network analysis in mixed-signal design applications.
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