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Certifications: Palo Alto Networks Certified Network Security Engineer (PCNSE), A10 Certification/Accreditation, FortiGate Engineer, Microsoft Certified Professional (MCP), Network+, Security.
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Advanced experience in configuring all types of Cisco hardware, Cisco IOS, and NX-OS.Knowledge of additional network products from various manufacturers is a plus (Juniper, Palo Alto, Aruba, etc.
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Job ID: TAP00093 Position : Senior Mechanical Engineer Location : US – MD, Fort Meade (or surrounding area) Category : Hardware Clearance Requirement : Active TS/SCI w/ polygraph Education Requirement : BS in Mechanical or Electrical Engineering (or related technical field) Experience Requirement : 15 Years TAP is seeking to hire a Senior Mechanical Engineer to join our team.
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HPC Software Engineer, TS/SCI with Full Scope PolygraphThe HPC Software Engineer, TS/SCI with Full Scope Polygraph designs, develops; tests, deploys, documents, maintains, and enhances complex and diverse software for HPC (High Performance Computing) systems based upon documented requirements.
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CTI is seeking an experienced TS/SCI polygraph cleared Intelligence Specialist to join our team in the Annapolis Junction area. Due to federal contract requirements, United States citizenship and an active TS/SCI security clearance is required for the position.
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The position requires an active TS/SCI with Polygraph. Technologies: Microservices, AWS, Docker, Kafka, Kubernetes, Cassandra, Java 17, Kotlin, ReactJS, Spring Boot/Cloud/Data, Redis, Postgres.
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An active Top Secret clearance and an ability to obtain and maintain a TS/SCI clearance with a Polygraph, which requires a US citizen. An active TS/SCI with a CI Polygraph. In this position, you will support the ACCESS Project Special Projects and Missions (SPM) Network Director (ND) by phasing in as a Deputy Task Lead to mirror the existing Task Lead through a transition phase of less than a year, after which time you will take over as the Task Lead. The task order entails leading a team of Mission Commitment Engineers (MCEs) to help NASAs SPM customers fulfill mission objectives.
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As required by our governmental client, this position requires being a US Citizen AND an active TS/SCI with Counterintelligence Polygraph clearance. Technical EditorThis position requires an active TS/Sensitive Compartmental Information (SCI) clearance with the ability and willingness to obtain a Counterintelligence polygraph to be considered.
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Must have an active Top Secret security clearance with the ability to obtain and maintain a TS/SCI with Polygraph. Experience with Adobe Creative Suite (InDesign, Photoshop, Illustrator, After Effects, Premiere, and Flash), Apple Final Cut Pro X, Map Publisher, and any other interactive graphics enablers, languages, or tools.
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Security Clearance Required: TS/SCI Full Scope PolyBlackstone Talent Group is a wholly owned subsidiary of Blackstone Technology Group, a global IT services and software firm that implements technological solutions across commercial industry verticals and the US Federal Government.
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Specifically in search of: CA/PKI SE: Online Certificate Status Protocol (OCSP), Active Directory, Certificate Authority, CAC Data Storage Technologies: Delinea , Entrust, Gigamon, Palo Alto, NVIDIA, Elastic, Trendmicro , Splunk/Tines, Cameo Cross Domain Solutions SE Threat Assessment/Vulnerability SEs *TS/SCI Full Scope required.
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Our client's specialties include implementing real-time solutions and analytics through the use of interactive applications and the integration of industry-standard software stacks for both enterprise data intelligence and cyber security protection against network threats and exploits.
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EMBEDDED SOFTWARE ENGINEERS Job Type: Full Time Level: Junior, Mid, Senior, Principal Location: Maryland (Annapolis Junction / Fort Meade area) Security Clearance: TS/SCI with Appropriate Agency Polygraph Artera Technologies, LLC’s performs extensive vulnerability research and security risk assessment of our clients’ various embedded devices and firmware.
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Required Clearance: TS/SCI FSRequired Qualifications: A Masters Degree in a Technical, Computer or Math related field with five (5) years experience in the following: Domain Name Server (DNS), Network Time Protocol (NTP) and IP routing protocols.
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Qualifications:● Must currently possess an active TS/SCI Clearance with Full-Scope Polygraph (FSP). We are currently seeking FPGA design engineers with emphasis on FPGA or ASIC design,development and verification using SystemVerilog, Verilog or VHDL. The design engineer will work closely with software and system engineers to conceptualize, document, design, code, verify and lab-debug ASIC, FPGA and embedded firmware designs.
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ts sci network palo alto jobs Title: network in Laurel, MD
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