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Background with System Verilog and UVM based methodology for ASIC verification. 4+ years of hands-on ASIC verification of challenging design units over multiple projects displaying good attention to detail, teamwork, problem solving and proven success.
$128,000 - $258,750 a yearFull-timeExpandApply NowActive JobUpdated Today - UpvoteDownvoteShare Job
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Note: This is Similar to the EM/IR Expert (Physical Design Verification) role with strong experience on EM/IR, Analog Design, ANSYS(Redhawk/Totem) or Cadence(Voltus) tool knowledge, TCL/Python, Calibre Extraction.
Full-timeExpandApply NowActive JobUpdated Today - UpvoteDownvoteShare Job
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BSc in Electrical Engineering or Computer Engineering 8+ years of experience in Mixed Signal Design Verification or MSc in Electrical Engineering or Computer Engineering with 6+ years of of experience in Mixed Signal Design Verification.
$106,800 - $178,000 a yearFull-timeExpandApply NowActive JobUpdated Today - UpvoteDownvoteShare Job
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Who You'll Work WithYou will be in the Silicon One development organization as an ASIC design verification engineer in San Jose, CA. You collaborate closely with verification engineers, designers, hardware and cross functional teams to verify the ASIC in simulation, in emulation and during ASIC bring up.
$144,800 - $214,100Full-timeExpandApply NowActive JobUpdated Yesterday - UpvoteDownvoteShare Job
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In-depth knowledge and experience working with low-power design, UPF integration, boot-up, power cycling, and HW/FW interaction verification. Hands-on verification experience of PCIe, Bus Fabric, NOC, AHB, AXI, based bus architecture in UVM environment.
$138,900 - $256,500 a yearExpandApply NowActive JobUpdated 2 days ago - UpvoteDownvoteShare Job
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Develop Real Number Models (RNM) for photonics and analog circuits, conduct AMS verification in conjunction with UVM, and ensure precise model representation. Play an integral role in the execution of emulation and formal verification for DV purposes.
ExpandApply NowActive JobUpdated 10 days ago - UpvoteDownvoteShare Job
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MS with 10+ years or PhD with 8+ years, 5+ years in ASIC verification team lead and management. Experience in high-performance data center or similar ASIC verification. Good knowledge on ASIC design and verification methodologies and flows.
ExpandApply NowActive JobUpdated 6 days ago - UpvoteDownvoteShare Job
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This role offers a unique platform to enhance your skills across a spectrum of areas including UVM, AMS modeling, mixed-signal verification, formal verification, emulation, and both performance modeling and verification.
$135,000 - $175,000 a yearFull-timeExpandApply NowActive JobUpdated 4 days ago - UpvoteDownvoteShare Job
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As a Design Verification Engineer at Lightmatter, you will find yourself at the heart of a dynamic, interdisciplinary team. Design and implement UVM testbenches for both subsystem-level and full-chip verification.
$200,000 - $240,000 a yearFull-timeExpandApply NowActive JobUpdated Yesterday - UpvoteDownvoteShare Job
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Verification: work with verification team on planning and execution, simulation, debugging block and system level simulations, formal verification, preparation of technical reviews and product/block documentation.
$116,700 - $216,700 a yearFull-timeExpandApply NowActive JobUpdated 6 days ago - UpvoteDownvoteShare Job
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Lumotive is seeking a Lead ASIC verification engineer to lead the verification of Beam Steering Mixed signal ASIC controller. Strong experience in chip/top level verification of complex Mixed Signal SoCs & ASIC.
$180,000 - $220,000Full-timeExpandApply NowActive JobUpdated 3 days ago - UpvoteDownvoteShare Job
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Verification of the ASIC design, architecture, golden models, and micro-architecture using sophisticated verification methodologies such as UVM. We are now looking for a Senior Verification Engineer for our Tegra group.
$128,000 - $258,750 a yearFull-timeExpandApply NowActive JobUpdated Today - UpvoteDownvoteShare Job
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Coding, and expertise in chip/full system level ASIC verification. Minimum 2 years of experience with chip/full system level ASIC verification skills. Minimum 2 years of experience with chip/full system level ASIC verification skills and debugging.
$75 - $80 an hourExpandApply NowActive JobUpdated 10 days ago - UpvoteDownvoteShare Job
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You will be in the Silicon One development organization as an ASIC design verification engineer in San Jose, CA. You collaborate closely with verification engineers, designers, hardware and cross functional teams to verify the ASIC in simulation, in emulation and during ASIC bring up.
ExpandApply NowActive JobUpdated 3 days ago - UpvoteDownvoteShare Job
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What You’ll Do:In the Sr. BMS Verification Engineer role, you will verify that Archer’s high voltage battery management and charging systems satisfy their requirements – enabling the use of electric vertical-takeoff-and-landing aircraft for urban air mobility.
$134,400 - $168,000 a yearFull-timeExpandApply NowActive JobUpdated 2 days ago
Title: verification in Sunnyvale, CA
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