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4 years of experience in design and analysis of electro-mechanical systems and products (e.g., sheet metal, injection molding, structural and thermal analysis). Experience with design principles in the areas of design for production, sheet metal, and injection molding, structural and thermal analysis.
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As a Senior Digital Design Verification Engineer at NVIDIA, you'll verify the design and implementation of our cutting edge SerDes IPs. This ground breaking technology will enable and accelerate gaming, artificial intelligence, deep learning, and autonomous driving.
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Experience with analog/digital circuit design and transmission line theory. You develop from the lowest levels of circuit design to large system design and see those systems all the way through to high volume manufacturing.
$102,000 - $150,000 a yearFull-timeExpandApply NowActive JobUpdated 30 days ago - UpvoteDownvoteShare Job
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Master's or PhD degree in Electrical Engineering, Physics or Bachelor in Electrical Engineering with Analog circuit design experience. Strong understanding of semiconductor device physics, IC (integrated circuits) fabrication and IC design.
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High speed design, Analog/Mixed circuits, Power, Compliance testing, Orcad, Allegro, Signal integrity, Power integrity. Title: Hardware Design Engineer. With its strong 55-year heritage and deep industry expertise, Capgemini is trusted by its clients to address the entire breadth of their business needs, from strategy and design to operations, fueled by the fast evolving and innovative world of cloud, data, AI, connectivity, software, digital engineering and platforms.
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Analog Mixed Signal Design Verification Engineer. Synapse ( A Quest Global Company) is seeking talent for mixed signal design verification engineer job position. Experience with mixed-signal design modelling and debugging.
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The candidate will work with a group of analog/RF IC design experts in the development of cellular-band ICs that transmit, receive, and/or switch signals to or from antennas. Requisition ID: 73067 Position Summary: The Skyworks San Jose Design Center is an ideal destination for motivated individuals with a strong desire to experience and become a part of what it takes to win in the highly competitive and fast-moving RF cellular mobile communications market.
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L ightIC Technologies is seeking to hire talented and motivated electrical engineers to join our hardware team and help develop the electronic hardware design of the system. Printed Circuit Board design to integrate FPGA with other on-board electronic.
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Strong knowledge of signal integrity analysis and PCB layout design principles. Proficiency with Cadence Allegro or comparable PCB design tools. Experience in package design or coordination with package design teams and signal integrity.
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Familiarity with industry standards and guidelines for PCB layout design. Coordinate with package design teams to optimize interfaces between PCB, package, and silicon. Understanding of power integrity considerations and multi-gigabit design challenges.
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1+ years of Knowledge of enterprise-level security and networking design and configuration (physical and topology, IP structures and ranges, switch interconnectivity, VLAN, bandwidth calculation.
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10+ years of experience as an ASIC Power Engineer, CAD Engineer, or Physical Design Engineer. Experience in low power design, tools, and methodologies including power intent UPF specifications.
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This role requires a strong background in electrical or computer engineering, proficiency in SystemVerilog and C/C. Bachelor's degree in Electrical or Computer Engineering is required. coding, and expertise in chip/full system level ASIC verification.
$75 - $80 an hourExpandApply NowActive JobUpdated 30 days ago - UpvoteDownvoteShare Job
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In this role you will design high performance analog and mixed signal circuits for today's highly sophisticated CMOS transceiver products in wireless and wireline applications, using state-of-the-art deep sub-micron CMOS technologies.
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Experience in EDA tools such as VCS, VCLP, Spyglass Lint, Questa CDC, Fusion Compiler, Design Compiler, Genus. MUST HAVE design background in Arteris NoC (Network on Chip) RTL generation or based on any other NoC tool.
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design job Title: electrical Company: Google in Santa Clara, CA
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