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A Principal Digital Verification Engineer will define and lead the development of the Digital Verification framework and infrastructure of complex digital and mixed-signal ICs utilizing leading edge technologies with industry standard ASIC tools.
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We are hiring a Principal Product Marketing Manager to drive critical elements of the next phase of our Firefly GTM strategy. We are hiring a Principal Product Marketing Manager to drive critical elements of the next phase of our Firefly GTM strategy.
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Work with multiple stakeholders across geographies to define emulation platform requirements, understand micro-architecture and architecture of SOC, scope and define test-plan, implement the test-plan which includes content/tool development, debug fails and ensure functionality as per specifications.
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Overview CAES is seeking a Principal Radar Engineer to support the development and transition to manufacturing of innovative radars. In this position you will work in a highly motivated team environment to develop and manufacture millimeter wave radars incorporating state of the art “Radar on a Chip” ASICs provided by our strategic partner.
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Considering every detail, you will help facilitate the creation of highly imaginative, intuitive, beautiful experiences and, above all else, experiences that empower individuals to gain insight into and take action on their personal genetic information.
$313,800 a yearFull-timeExpandApply NowActive JobUpdated Today - UpvoteDownvoteShare Job
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KPI achievement in product related deliverables including NPI execution and velocity, product cost (Gross margin improvements), product quality performance and failure analysis cycle times
$190,000 a yearFull-timeExpandApply NowActive JobUpdated Today - UpvoteDownvoteShare Job
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The Principal Electrical Engineer is responsible for medical device design, development, implementation, testing, and documentation. A leading medical device manufacturing company is looking to hire a Principal Electrical Engineer to their growing team.
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We are seeking an experienced Principal Engineer for High-Speed Optical transceiver Design to join our growing team. Support selection and characterization of DSP, RF IC, and photonic ICs and subassemblies.
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As our Senior Principal Product Cybersecurity Engineer, you will focus on innovating automotive cybersecurity compute platforms by conducting novel research, developing prototype systems, interfacing with production engineering teams, experimenting with state-of-the-art technologies, deploying offensive cyber capabilities to test defensive resiliency, and much more.
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The Principal Electrical Engineer will join the Research & Development organization in designing, developing, and testing novel electronic systems based on medical operating devices. The Principal Electrical Engineer will join the Research & Development organization in designing, developing, and testing novel electronic systems based on medical operating devices.
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As a Principal Analog Design Engineer, you would be participating in architectural investigations and sparking innovations yielding in highly optimized and industry leading circuit solutions for high speed Serdes design in the state-of-the-art process nodes.
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Acacia designs intelligent transceivers using advanced signal processing and photonic integration for the 100G, 400G and 1T bit speed fiber optic transmission market deployed in data center, metro, long-haul and ultra-long haul telecommunication networks.
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Job Description - Technical Lead Principal Power Engineer. Proficient in the complete flow of CAD design tools such as Cadence, Concept, Allegro. Job Description - Technical Lead Principal Power Engineer.
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We believe bitcoin plays an essential role in the future of payments and the world’s economy.
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This role is for a Senior Principal DFT Architect with 16+ years of proven experience in Design for Test. Core DFT skills considered crucial for this position should include some of the following: Siemens DFT tools, Streaming Scan Network (SSN), Scan compression and insertion, Memory BIST and repair scheme implementation, Logic BIST, JTAG/IJTAG, at-speed test, ATPG, fault simulation, DFT mode timing constraints, back-annotated gate level verification, silicon debug, memory and scan diagnostics.
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Title: principal Company: Access Vascular in San Jose, CA
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