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Plan for layout and supervise IC layout engineers for high-performance AMS layout techniques, top level and floor plans. Transistor Level (CMOS & SiGe) circuit design and simulation. Lumentum’s commercial lasers enable advanced manufacturing techniques and diverse applications including next-generation 3D sensing capabilities.
Full-timeExpandApply NowActive JobUpdated 3 months ago - UpvoteDownvoteShare Job
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You will play a principal role in developing next-gen SOC architecture, perform IP integration, chip level RTL design & verification and lead low power design methodology. Candidate must be able to work with self-motivation and deliver on commitments with challenging schedules, lead design teams through various phases of ASIC design process including RTL design, chip level verification, coverage analysis, synthesis and STA. Candidate must possess solid knowledge in SOC design techniques, analog IPs, high speed IO protocols, CPF/UPF power design flow and lint/CDC tools.
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Derive behavioral models for AMS circuits, deliver top level verification needs. We are currently seeking a Analog Mixed Signal (CAMS) IC Design Engineer. In-depth understanding of high-performance, high-speed analog mixed signal circuit IC designs, calibration, equalization and signal integrity fundamentals.
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Drive development and validation of new NAND testing capabilities required for Micron to achieve BIC test cost and effective screening for new, unique failure mechanisms on next node NAND test chips.
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Comtech Telecommunications Corp. is looking for an entry-level RF Microwave Engineer. Comtech Telecommunications Corp. is a leading global technology company providing terrestrial and wireless network solutions, next-generation 9-1-1 emergency services, satellite and space communications technologies, and cloud-native capabilities to commercial and government customers around the world.
Full-timeExpandApply NowActive JobUpdated 17 days ago - UpvoteDownvoteShare Job
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Develop next generation tools and flows to address Power Integrity (PI) and Signal Integrity (SI) challenges in Analog and Mixed Signal designs. Assist customers and technical field team in solving issues related to transistor level EMIR simulations, run in batch mode or Analog Design Environment.
$128,100 - $237,900 a yearFull-timeExpandApply NowActive JobUpdated 3 months ago - UpvoteDownvoteShare Job
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Duties:Develop next generation tools and flows to address Power Integrity (PI) and Signal Integrity (SI) challenges in Analog and Mixed Signal designs. Please note that the salary range is a guideline and compensation may vary based on factors such as qualifications, skill level, competencies and work location.
$128,100 - $237,900 a yearFull-timeExpandApply NowActive JobUpdated Today - UpvoteDownvoteShare Job
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Manage or perform thermal testing (including airflow, acoustic, thermocouple testing, modules, and/or platform level validations) to validate simulation models. What You'll DoYou will be joining the SP platform Mechanical Thermal group in San Jose, CA, which is responsible for designing and developing complex electro-mechanical systems for a variety of networking products from fixed to centralized and distributed architectures with sizes ranging from 1U to 40U. You’ll work with Hardware Distinguished Engineers and Hardware Leads to architect and develop cooling solutions for next generation high performance routing platforms.
$162,000 - $238,700Full-timeExpandApply NowActive JobUpdated Today - UpvoteDownvoteShare Job
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Description: As a RF IC design engineer, you will be a key member of a small RFIC team, researching, designing and bringing the next-generation of wireless technologies into high-volume production in advanced CMOS technology nodes.
$138,900 - $256,500 a yearExpandApply NowActive JobUpdated Today - UpvoteDownvoteShare Job
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Successful candidate will have an SOC/ASIC Design background, would have participated in several silicon design projects with increasing level of scope/responsibilities and has a history of achieving results through effective execution.
Full-timeExpandApply NowActive JobUpdated 11 days ago - UpvoteDownvoteShare Job
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The Staff Optical Engineer will collaborate to develop next generation patterned wafer geometry metrology platform to produce comprehensive wafer warp, bow, dual-sided nanotopography, high-resolution distortion, in-plane displacement and stress measurements for IC manufacturers.
$125,100 - $212,700 a yearExpandApply NowActive JobUpdated Today - UpvoteDownvoteShare Job
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As a hands-on expert in Ansys products, you will use advanced-level engineering knowledge to provide technical pre-sales support, perform professional services, and help translate customer requirements into exciting new product features.
Full-timeRemoteExpandApply NowActive JobUpdated 9 days ago - UpvoteDownvoteShare Job
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If you are looking to take your SQL Server and Snowflake development skills to the next level, we would love to hear from you! Knowledge in automation tools such as Ansible, Terraform and Platforms: Python, Airflow, ElasticSearch.
$68 - $85 an hourFull-timeExpandApply NowActive JobUpdated 2 months ago - UpvoteDownvoteShare Job
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In HAPS emulation/prototyping flow, the design under test is partitioned into multiple parts, each of which is compiled into a low-level binary bit-stream that can be downloaded and run on an underlying FPGA in the emulation/prototyping hardware.
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INFINITY FABRIC MICRO-ARCHITECT & RTL DESIGN ENGINEER THE ROLE: As a member of the Infinity Fabric Architecture and RTL team, you will help build the next generation scalable coherent interconnect to provide connectivity between CPU, GPU and special purpose accelerators.
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