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A Principal Digital Verification Engineer will define and lead the development of the Digital Verification framework and infrastructure of complex digital and mixed-signal ICs utilizing leading edge technologies with industry standard ASIC tools.
$230,000 a yearFull-timeExpandApply NowActive JobUpdated Today - UpvoteDownvoteShare Job
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Bright Vision Technologies has an immediate opportunity for a ASIC Verification Engineer in San Jose, CA. Job Title: ASIC Verification Engineer. You will be responsible for RTL SoC/Subsystem verification of ARM based SoCs, and work on industry-standard verification methodologies like UVM, Portable Stimulus and Formal verification flows.
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This is a role for a versatile engineer that includes RTL design, verification, Emulation/FPGA partitioning and implementation, and lab based bringup of the SoC/GPU chips. + Extensive design verification experience (RTL, Emulation, or Prototyping.
$356,500 a yearFull-timeExpandApply NowActive JobUpdated Today - UpvoteDownvoteShare Job
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The company is seeking a Lead ASIC Verification Engineer to spearhead the verification of their Beam Steering Mixed Signal ASIC controllers. Lead ASIC Verification Engineer. Lead the verification process for Beam Steering Mixed Signal ASIC controllers.
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Mixed Signal Modeling/Verification Engineer. Experience working with Cadence mixed signal verification environment. Develop appropriate assertions to enforce analog/digital specs are respected and provide digital verification passing criteria.
$264,200 a yearExpandApply NowActive JobUpdated Today - UpvoteDownvoteShare Job
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Knowledge of ASIC verification flows with SystemVerilog / UVM. In this role you will be responsible for ASIC pre-silicon verification of extremely complex high performance Wireless Radio digital controllers, Radio sub-systems and Radio integration.
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About the job As a Design Verification Engineer, you will be an integral part of our mission to deliver cutting-edge cryptography processors. Own and develop formal and UVM verification methods to ensure the completeness and consistency of the design.
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Experience with both static (i.e. VC LP) and dynamic (i.e. VCS NLP) power-aware verification flows. Hands on experience with SV (SystemVerilog) and UVM (Universal Verification Methodology.
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Creativity is a necessity to overcome the challenges inherent to verifying the proper operation of our low-power GPU. Versatility and broad knowledge of state-of-the-art verification techniques including the most up-to-date IEEE UVM version will place you among the elite within our profession.
$100 an hourExpandApply NowActive JobUpdated 4 months ago - UpvoteDownvoteShare Job
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Job Title: ASIC/SoC Design Verification Engineer Position Type: Full-Time / On-Site Location: Fremont, CA Salary Range / Rate: $110,000 - $300,000 Job ID#: 136685 Year of Experience: More than 8 years Responsibilities: 1.
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5) Implementing test plans into executable test suites using a cutting edge System Verilog verification environment as well as leveraging high performance verification platforms such as test bench acceleration and In-circuit emulation as required.
$163,000 - $260,000Full-timeExpandApply NowActive JobUpdated Today - UpvoteDownvoteShare Job
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Role and ResponsibilitiesAs a Design Verification Engineer you will contribute to the functional verification of GPU Shader Subsystem. Deep understanding of constrained randomization and the development of efficient test suitesExperience with code coverage and functional coverage driven verification methodology.
$144,345ExpandApply NowActive JobUpdated Today - UpvoteDownvoteShare Job
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Job DescriptionSenior E/E & Semiconductor Engineer - Mixed Signal Verification Engineer-DescriptionPosition- Mixed Signal DV Engineer Location-Sunnyvale CA - Onsite roleJob description:We are seeking Mixed signal Design Verification Engineer who is proficient in system verilog real number modeling and experience with UVM. Proficient in debug skills and experienced with gate level parasitic annotated simulations.
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Understand medical device quality management systems (QMS) Must be able to function independently and work in a team Knowledge of SW/Python (Python or MATLAB, and some Linux) Mechatronics/Capital system/Integrated HW + SW preferred Test method, design verification, documentation experience desired (Agile/PLM, test cases, protocol, IQOQ, etc.
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As the Advanced Design Verification Engineer , you will lead next-generation ASIC infrastructure initiatives, including the development of tools and infrastructure targeting efficiency and reuse spanning DV, Emulation, pre, and post-silicon.
$170,000 a yearFull-timeExpandApply NowActive JobUpdated 2 days ago
Title: verification Company: Working Solutions in Milpitas, CA
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