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Have a deep understanding of Verilog or SystemVerilog, logic design and circuit modeling for mixed-signal blocks. As a member of our Mixed-Signal high-speed I/O SerDes group, you'll be working on NVDIA's latest ground breaking technology that enables and accelerates gaming, artificial intelligence, deep learning, and autonomous driving.
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You will evaluate design feasibility and analyze circuit functionalities, implement analog and mixed signal circuit design to meet specifications, and validate design performance and functionalities by running block and chip level simulations using standard industry simulators, creating clear and effective documentation.
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Conduct transistor-level feasibility study for various Analog/Mixed-Signal circuit blocks. Strong device physics knowledge as it applies to analog IC design. In-depth knowledge and analytical understanding of mixed-signal design techniques.
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This is running mixed signal - DMS simulations and developing system verilog and EEnet based analog models Life at CapgeminiCapgemini supports all aspects of your well-being throughout the changing stages of your life and career.
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Job DescriptionRenesas’s CMSD (Configurable Mixed Signal Division) is seeking a highly experienced product definer with expertise in high performance analog & data converter applications.
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As a member of the mixed signal team, the candidate's work encompassing the development of the state of the art mixed signal IP for SOC including SerDes, PLL, DDR PHY, MIPI PHY, candidate will have exposure to a broad range of IP design phases, including analog circuit level transistor design, IP top level mixed-mode modeling, digital system RTL design, verification, synthesis, STA analysis, simulation and verification in mixed-signal IC environment.
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Experience: Minimum 5+ years of experience in Analog IC Design, with some experience in high voltage AC/DC technical aspects preferred. Strong understanding of digital design, RTL synthesis, Verilog AMS, SystemVerilog, and familiarity with analog circuit blocks and device physics.
$137,000 a yearFull-timeExpandApply NowActive JobUpdated Today - UpvoteDownvoteShare Job
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High Speed Analog/Mixed-Signal IC Design Engineer Apple products are impacting millions of people across the globe. Proven track record in high-speed analog/mixed-signal architecture and circuit design and productization.
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Experience in RF/mm-wave analog circuit design. Knowledge of SERDES and mixed signal interfaces. Knowledge of signal processing and signal integrity in optical communications.
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Assess - Current state of Nortel PBX system and map out Analog & Digital ports. Complete tasks relating to Migration from legacy Nortel PBX system to Cisco VoIP platform. Hands-on experience on all aspects of Cisco VoIP technology & its implementation (e.g., CUCM, Unity VM system, Paging etc.
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Trouble-shoot and repair electronic circuits to the component level & electro-mechanical systems, familiar with Altium, SOLIDWORKS & electronic testing equipment oscilloscopes, multimeter, logic analyzers, waveform generators, hand soldering circuit components & electrical wires.
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Floorplanning (power/ground, digital/analog signal routing, etc.) Who you’ll work with:You will work with other Acacia mixed-signal engineers to collaborate in order to provide an optimized design that will integrate into the ASIC. In addition, you will have the opportunity to interact with other Acacia groups including digital/DSP design, system design, package design, and module design.
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Analog and mixed signal circuit (detector signal conditioning circuit) design at both chip and PCB level. Customized semiconductor device package design. Analog and mixed signal circuit (detector signal conditioning circuit) design at both chip and PCB level.
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Core DFT skills considered crucial for this position should include some of the following: Siemens DFT tools, Streaming Scan Network (SSN), Scan compression and insertion, Memory BIST and repair scheme implementation, Logic BIST, JTAG/IJTAG, at-speed test, ATPG, fault simulation, DFT mode timing constraints, back-annotated gate level verification, silicon debug, memory and scan diagnostics.
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Architect and Create verification environments using System-Verilog and Universal verification methodology-UVM IPs and SoCs with embedded CPUs and analog mixed-signal interfaces. Architect and Create verification environments using System-Verilog and Universal verification methodology-UVM IPs and SoCs with embedded CPUs and analog mixed-signal interfaces.
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analog logic jobs Title: mixed signal in Cupertino, CA
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