Digital Design Engineer (MPU)

Digital Design Engineer (MPU / AI Hardware)Design the cores behind next-generation AI hardwareAt BrainChip, we're building a new class of AI hardware. Our neuromorphic processors enable real-time, ultra-efficient intelligence directly on devices.We're looking for a Digital Design Engineer to help design and implement the core compute architecture behind our next-generation systems.This role sits within our hardware team and spans the full design lifecycle, from microarchitecture through RTL, verification, and silicon delivery.If you enjoy building processors, working close to the hardware, and solving performance challenges for AI workloads, this is a strong fit.What you'll doTranslate product requirements into scalable microarchitecture designsDesign and implement digital modules using RTLDevelop and integrate processor cores including RISC-V-based architecturesContribute to CPU design including pipeline, cache, and system architectureBuild and debug FPGA prototypes for system-level validationRun simulations at RTL and gate level to verify functionalityCollaborate on verification strategies and test plansWork closely with cross-functional teams across hardware and softwareDocument designs clearly to support development and bring-upWhat you bring3+ years of experience in digital design or RTL developmentStrong understanding of modern processor and compute architecturesExperience with embedded MPU design, ideally RISC-V or similarProficiency in Verilog and SystemVerilogFamiliarity with SoC components, memory systems, and system buses such as AXI, AHB, or APBExperience with simulation and debugging tools such as VCS, Verdi, or similarSolid debugging skills and attention to detailNice to haveExperience with high-speed interfaces such as PCIe, USB, or DDRFamiliarity with standard interfaces such as SPI or I2CExperience with Python or scripting for automationExposure to hardware-software co-design or AI workloadsWhy this roleWork on real silicon powering next-generation AI systemsContribute directly to processor and system architectureCollaborate with a high-caliber hardware and software teamBuild technology that runs in real-world devicesDetails* Hybrid in Laguna Hills, CA (3 days onsite per week)