<Back to Search
Technical Intern, DDR Validation- Analog Characterization
Santa Clara, CAApril 2nd, 2026
DescriptionInvent the future with us.Ampere is a semiconductor design company for a new era, leading the future of computing with an innovative approach to CPU design focused on high-performance, energy efficient AI compute.As a pioneer in the new frontier of energy efficient high-performance computing, Ampere is part of the Softbank Group of companies driving sustainable computing for AI, Cloud, and edge applications.Join us at Ampere and work alongside a passionate and growing team - we'd love to have you apply!About the role:Join our Silicon Validation Team as a DDR Validation Engineering Intern to directly shape the reliability of next-generation, high-performance processors. You'll gain invaluable hands-on experience setting up and optimizing advanced DDR4/5 pre/post-silicon validation environments, performing critical SI/PI debugging, IO tuning, PVT characterization and compliance testing. You'll have the opportunity to collaborate with design engineers to diagnose and resolve complex hardware issues.The Ampere Internship program focuses on you to build your networks, support your efforts in making an impact, and gives you exposure to what Ampere does and how Ampere operates across the company. We want you to leave with the feeling that what you've worked on made a difference, a new level of confidence in what you're capable of, technical expertise, and a new network of contacts.Internship period is full-time for summer 2026 (May/June - August/September)What you'll achieve:Perform Analog Characterization and Signal Integrity (SI) measurements using oscilloscopes and advanced test equipment.Conduct Digital Characterization, including margin testing and comprehensive test execution, to validate system performance.Develop test automation scripts (e.g., Python) and implement C-code modifications for test infrastructure and firmware.About you:Deep understanding of Analog/Digital circuit design, testing and characterization.Experience with Signal integrity (SI) simulation methodologies .Hands-on experience with oscilloscopes and spectrum analyzers.Solid C Programming skills.Additional skills highly desired : CPU Architecture, ARM Architecture, Previous (Post) Silicon Validation Experience, Memory, Python.Education:Currently pursuing a master's degree in Electrical Engineering, Computer Engineering, or related field.What we'll offer:At Ampere we believe in taking care of our interns and providing a competitive rewards package that includes an hourly rate and comprehensive benefits. The pay range for this role is between $55 and $60 per hour.Benefits highlights include:Premium medical, dental, and vision insuranceMentorship and on-the-job training from industry expertsErgo friendly desk set-upVibrant game rooms to take a break and bond with colleaguesMicro-kitchens with a variety of healthy snacks, espresso, and refreshing drinksAnd there is much more than compensation and benefits. At Ampere, we foster an inclusive culture that empowers our interns to do more and grow more. We are excited to share more about our internship opportunities with you through the interview process.Internships are open to all eligible students regardless of age including veterans who returned to school.#LI-GW1#LI-Hybrid
632 matching similar jobs near Santa Clara, CA
- Manager Quality Engineering
- Firmware Engineer - BMC / OpenBMC (27751)
- Manager Quality Engineering
- Product Quality Engineer
- Sr. Product Management Specialist - Embedded Products
- Technical Director of Mixed Signal
- Director, Industrial Development & Entitlements
- Lead AI/ML Architect: Industrial & Automotive Pipelines
- Solution Design Lead IRC267438
- Sr Test Engineer, Flight Controls System
- Senior Staff AI/ML & GPU Performance Validation Engineer
- Sr. Battery Test Engineer - Abuse
- Engineering Internal Communications Lead
- Manager Quality Engineering
- Manager Quality Engineering
- SR MANUFACTURING ENGINEER
- Director - Manufacturing Systems & Operations
- Finance Process Excellence Lead (Hybrid)
- Strategic Electronics Buyer | Sourcing & Cost Reduction
- Data Center Project Manager - End-to-End Infra Delivery
- Lead Architect
- Head of HW Operations
- Senior Software Engineer: Control
- SiC Power Product Lead for Automotive Inverters
- Senior Hardware Architect, Networking & Datacenter Systems
- Field Service Engineer
- Senior Electrical Engineer - PCBA Troubleshooting
- Senior C++/Linux Systems Engineer - Multi-threaded HPC
- Transmission Planning Engineer
- Technical Support Engineer (Spanish)
- Staff/Principal Software Engineer, Control
- Principal Architect - AI Foundations & Orchestration
- HWIL Electrical Engineer - P3
- Board Member, MedTech
- Board of Directors
- DFT Engineer
- AI Engineering Architect - Agentic AI & Digital Engineering
- Vice President, CMC Product Development
- Principal GPU Validation Engineer
- ATE 2 / System Integration and Test