SOC Engineer

Overview Enla­se AMD’s SOC design team to own end-to-end design and integration of advanced silicon. You will bridge RTL, IP integration, and full-chip construction to optimize latency and performance. You’ll collaborate across IP development, verification, front-end, and physical design to solve hard problems at scale. This role offers the chance to shape next-gen silicon in a cross-functional, innovation-driven environment. You’ll contribute to technology that moves the world forward through HPC, AI, and cloud computing. ResponsibilitiesDrive SOC-level design and integrationIntegrate IP, SOC-level fabric, voltage/clock crossings, clocks, resets, fuses, and I/ODevelop RTL design and coding for SOC sections and related logicOwn SOC power designPerform static verification of the design (RTL, CDC, Power, Connectivity)Lead one of the domains listed above Key requirementsVerilog RTL development with industry tools in CPU/SOC/ASIC environmentsSOC integration and architecture understandingSystem bus protocol knowledge (AXI, PCIe)Power implementation methodology and UPFStatic timing analysisCollaboration with physical design teams and awareness of physical design requirementsFormal verification techniques and toolsScripting skills (Ruby, Perl, Shell, TCL)Excellent written and verbal communicationStrong analytical and problem-solving abilitiesSelf-driven with initiativeVerilog RTL developmentSOC integration and architectureSystem bus protocols (AXI, PCIe)