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Sr. SOC Design Verification Engineer, Dojo
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Full-time
- Integrate and work with VIPs to stress-test our IPs for various protocols
- Run real world software use cases on emulation and FPGA. Measure performance and feedback to designers
- Verilog, System Verilog, UVM, assembly, and Python
- Proficient in debugging SOC, CPU, GPU, fabric, NOC, memory, various protocols like PCIE or Ethernet, or other complex ASIC designs
- Deep knowledge of system architecture including CPU, GPU, fabrics, interconnects, NOC, memory sub-systems, I/O peripherals (UART/SPI), bus protocols (AXI/APB), PCIE, Ethernet, DMA, CSRs, SerDes, PHY, etc.
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