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Senior HBM Design Engineer
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- In HBM DEG (High Bandwidth Memory - DRAM Engineering Group), we innovate and integrate end-to-end groundbreaking front-end and backend processes with groundbreaking design, debugging various tests, and qualification techniques to develop the lowest power per bit solutions to improve customer experience in the field of ML (Machine Learning) and AI (Artificial Intelligence).
- Furthermore, "high bandwidth"; is an outstanding memory design area where custom gate-level design and RTL style logic design are blended into the same product, and most of the DDR or LPDDR design is based on the gate-level design only.
- Convert Architecture specification to Micro-architecture specification, and implement logic functions in RTL using Verilog/System Verilog.
- Pair with Architect, Modeling, Analog, Design Verification, and APR designers to ensure a smooth interface between Digital and Analog circuits, project execution, and integration.
- Proactively collaborate with Standards, CAD, modeling, and verification groups to ensure the design quality.
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