Georgia Tech Research Institute (GTRI)

Embedded Systems, Hardware Development/Design, Electronic Warfare, Modeling/Simulation, Networking, RF, Testing, Aerospace, Aircraft, Avionics. Hardware Engineers develop mixed-signal design solutions including analog, RF and digital portions for Electronic Warfare, Radar, Avionics and Communication Systems.. 5 years of related experience with a Bachelors degree in Aerospace Engineering, Electrical Engineering, Systems Engineering, Computer Engineering, Mechanical Engineering, Computer Science, Industrial Engineering, Mechatronics Engineering, or related field. 3 years of related experience with a Masters degree in Aerospace Engineering, Electrical Engineering, Systems Engineering, Computer Engineering, Mechanical Engineering, Computer Science, Industrial Engineering, Mechatronics Engineering, or related field. 0 years of related experience with a Ph. D. in Aerospace Engineering, Electrical Engineering, Systems Engineering, Computer Engineering, Mechanical Engineering, Computer Science, Industrial Engineering, Mechatronics Engineering, or related field

hardware engineer

Hardware Engineer - ELSYS - On Site - (Open Rank) ID: 499364 Type: Researchers Location: Atlanta, GA Categories: Embedded Systems, Hardware Development/Design, Electronic Warfare, Modeling/Simulation, Networking, RF, Testing, Aerospace, Aircraft, Avionics Overview:
The Georgia Tech Research Institute (GTRI) is the nonprofit, applied research division of the Georgia Institute of Technology (Georgia Tech).Founded in 1934 as the Engineering Experiment Station, GTRI has grown to more than 2,900 employees, supporting eight laboratories in over 20 locations around the country and performing more than $940 million of problem-solving research annually for government and industry.GTRI's renowned researchers combine science, engineering, economics, policy, and technical expertise to solve complex problems for the U.S. federal government, state, and industry. Georgia Tech's Mission and Values
Georgia Tech's mission is to develop leaders who advance technology and improve the human condition. The Institute has nine key values that are foundational to everything we do: Students are our top priority. We strive for excellence. We thrive on diversity. We celebrate collaboration. We champion innovation. We safeguard freedom of inquiry and expression. We nurture the wellbeing of our community. We act ethically. We are responsible stewards. Over the next decade, Georgia Tech will become an example of inclusive innovation, a leading technological research university of unmatched scale, relentlessly committed to serving the public good; breaking new ground in addressing the biggest local, national, and global challenges and opportunities of our time; making technology broadly accessible; and developing exceptional, principled leaders from all backgrounds ready to produce novel ideas and create solutions with real human impact. Project/Unit Description
The Applied Embedded Systems (AES) Division in the Electronic Systems Laboratory (ELSYS) is currently seeking an AI/ML Engineer. AES is predominantly focused on the research, development, testing, and deployment of embedded electronic and electromechanical systems. These systems provide our sponsors with technological solutions in the fields of Electronic Warfare (EW), command and control, communications, avionics, entertainment, health monitoring, and other applications. Many of these systems serve a national security mission by providing advanced capabilities for fulfilling multiple missions and protecting against a variety of adversarial threat types. The AI/ML Engineer selected for this position will design, develop, and support fielding of AI/ML solutions for these and other complex systems. Job Purpose Hardware Engineers develop mixed-signal design solutions including analog, RF and digital portions for Electronic Warfare, Radar, Avionics and Communication Systems. Specific activities include RF and analog development using system, circuit or board design and simulation tools; development of digital systems (including high-speed digital buses and FPGAs) via circuit simulation, schematic capture, board layout and assembly design; bring-up, test and debug of the resulting hardware utilizing test equipment such as network analyzers and spectrum analyzers; and integration with other system components. Additional activities include analysis of system performance, improvement analysis, test process and procedure design and collaboration with other engineering teams. Key Responsibilities Perform circuit simulation, schematic capture, and board layout for submodules of a platform design Generate documentation of hardware Design and theory of operation Perform lab testing activities Integrate modules with other system components Significant contributions to technical reports and presentations Begin to take ownership of small team development, mentoring others Significant contributions to white papers, and competitive proposals Additional Responsibilities Lead the development and composition of new/updated open standards Lead technical meetings with GTRI and sponsor personnel, and support issue tracking and hardware development planning Lead proposal efforts or new research areas suitable for internal research and development (IR&D) funding Lead teams of electrical and mechanical researchers in support of sponsored research efforts Required Minimum Qualifications Experience with open hardware standards (e.g. OpenVPX) Experience developing hardware for embedded environments, including but not limited to FPGA designs, analog/digital circuits, or other embedded hardware Knowledge of computer architectures as it relates to embedded hardware and communications standards (e.g., Ethernet, PCI Express) Preferred Qualifications Active Secret Clearance Experience with Intelligent Platform Management Interface (IPMI) or other forms of open systems management Experience with high-speed processing, especially signal processing Knowledge of avionics protocols and interfaces, including but not limited to ARINC- and VITA-standard protocols, serial, discrete signal, MIL-STD-1553 and/or analog interfaces Travel Requirements Education and Length of Experience This position vacancy is an open-rank announcement. The final job offer will be dependent on candidate qualifications in alignment with Research Faculty Extension Professional ranks as outlined in section 3.2 of the Georgia Tech Faculty Handbook Levels 3, 4 5 years of related experience with a Bachelors degree in Aerospace Engineering, Electrical Engineering, Systems Engineering, Computer Engineering, Mechanical Engineering, Computer Science, Industrial Engineering, Mechatronics Engineering, or related field 3 years of related experience with a Masters degree in Aerospace Engineering, Electrical Engineering, Systems Engineering, Computer Engineering, Mechanical Engineering, Computer Science, Industrial Engineering, Mechatronics Engineering, or related field 0 years of related experience with a Ph.D. in Aerospace Engineering, Electrical Engineering, Systems Engineering, Computer Engineering, Mechanical Engineering, Computer Science, Industrial Engineering, Mechatronics Engineering, or related field U.S. Citizenship Requirements Due to our research contracts with the U.S. federal government, candidates for this position must be U.S. Citizens. Clearance Type Required Candidates must be able to obtain and maintain an active security clearance. Benefits at GTRI Comprehensive information on currently offered GTRI benefits, including Health & Welfare, Retirement Plans, Tuition Reimbursement, Time Off, and Professional Development, can be found through this link: Equal Employment Opportunity
The Georgia Institute of Technology (Georgia Tech) is an Equal Employment Opportunity Employer. The University is committed to maintaining a fair and respectful environment for all. To that end, and in accordance with federal and state law, Board of Regents policy, and University policy, Georgia Tech provides equal opportunity to all faculty, staff, students, and all other members of the Georgia Tech community, including applicants for admission and/or employment, contractors, volunteers, and participants in institutional programs, activities, or services. Georgia Tech complies with all applicable laws and regulations governing equal opportunity in the workplace and in educational activities. Georgia Tech prohibits discrimination, including discriminatory harassment, on the basis of race, ethnicity, ancestry, color, religion, sex (including pregnancy), sexual orientation, gender identity, gender expression, national origin, age, disability, genetics, or veteran status in its programs, activities, employment, and admissions. This prohibition applies to faculty, staff, students, and all other members of the Georgia Tech community, including affiliates, invitees, and guests. Further, Georgia Tech prohibits citizenship status, immigration status, and national origin discrimination in hiring, firing, and recruitment, except where such restrictions are required in order to comply with law, regulation, executive order, or Attorney General directive, or where they are required by Federal, State, or local government contract. All members of the USG community must adhere to the USG Statement of Core Values, which consists of Integrity, Excellence, Accountability, and Respect. These values shape and fundamentally support our University's work. Additionally, all faculty, staff, and administrators must also be aware of and comply with the Board of Regents and Georgia Institute of Technology's policies on Freedom of Expression and Academic Freedom. More information on these policies can be found here: Board of Regents Policy Manual | University System of Georgia (usg.edu). Posted: 01/31/2024 Closes: 04/30/2024 #J-18808-Ljbffr

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