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Digital Design And Verification Engineer
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- The Engineers primary responsibility will be the RTL design and verification.
- Responsibilities on the design side will include function definition, micro architectural specification, design, simulation, verification, and synthesis at module and subsystem levels.
- The verification side include pre-silicon RTL verification on block, subsystem and top level.
- As part of the System Design Enablement team at Cadence in Europe, the Digital Design and Verification Engineer will work closely with SoC architects and senior engineers, deploying Cadence technology in demanding customer projects, creating leading edge MPSoCs for automotive, networking, and consumer markets.
- Excellent knowledge of hardware and verification languages (e.g., SV, Verilog, VHDL, SystemC)
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