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ASIC Design Verification Engineer
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$95,400 - $133,000 a year
Full-time
- Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization.
- As a Design Verification Engineer, you will be part of a dynamic team working with the best in the industry, focused on developing innovative ASIC solutions for Facebook’s data center applications.
- You will be responsible for the verification closure of a design module or sub-system from test-planning, UVM based testbench development to verification closure.
- Along with traditional simulation, you will be able to use other approaches like Formal and Emulation to achieve a bug-free design.
- The role also provides ample opportunities to partner and collaborate with full stack software, hardware, ASIC Design, Emulation and Post-Silicon teams towards creating a first-pass silicon success.
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