Senior RTL Design Engineer - Accelerator IP

A leading telecommunications firm is seeking a Senior RTL Design Engineer based in Austin, Texas. In this role, you will own the microarchitecture of next-generation L1 accelerators. Your work will involve transforming complex DSP algorithms into high-performance RTL through SystemVerilog. We're looking for someone with significant RTL design experience and the ability to lead design decisions that shape innovative telecom products. This position offers competitive compensation, hybrid working options, and a vibrant team environment. #J-18808-Ljbffr