RISC-V Verification Engineer: Random Test Generator & Assembler

Qualcomm Technologies, Inc. in California is seeking a software/hardware engineer to contribute to a Python-based random test generation framework and an assembler library that drive a RISC-V CPU design-verification toolchain. The RTG generates JIT-style, simulator-coupled test cases exercising the RVA23.1 ISA, including privileged modes, memory, interrupts and cryptography extensions. You will implement new generation objects for RISC-V extensions, verify encodings, and write themes to improve