Senior SoC RTL Integration Engineer

Sintegra Inc. is seeking an experienced RTL Integration Engineer to join our ASIC/SoC design team in San Francisco. You will integrate RTL blocks, IPs, and subsystems into the top-level design, ensuring functional correctness and efficient handoff to verification and physical design teams. You will collaborate with front-end and back-end teams to meet timing, lint, CDC, RDC, and synthesis constraints, and drive best practices for hierarchy, naming, and signal integrity across the SoC. #J-18808-Ljbffr