JOBSEARCHER

Datacenter & Agentic AI Workload Performance Optimization Engineer

Overview: In this role you optimize software workloads running on Tenstorrent's next-gen RISC-V platforms, improving throughput, latency, and efficiency. You work across runtimes, compilers, and CPU microarchitecture to identify bottlenecks and implement hardware-aware optimizations. You will profile real-world AI and datacenter workloads and explore vector/SIMD and custom ISA opportunities. You'll collaborate with cross-functional teams to shape the software ecosystem and influence future CPUs, using AI-assisted workflows to accelerate optimization. Compensation / Benefitscompetitive compensation packageremote workbenefitsequal opportunity employer
Responsibilities:
  • Identify performance bottlenecks across runtimes, compilers, and applications
  • Develop software, compiler, runtime, and hardware-aware optimizations to improve throughput and latency
  • Bring up and tune major runtimes; profile real-world workloads
  • Investigate memory behavior and concurrency; analyze performance data to form hypotheses
  • Explore optimizations using RISC-V Vector/Matrix capabilities and custom instructions
  • Collaborate with AI-assisted development workflows to automate profiling, coding, benchmarking, and optimization
  • Influence the RISC-V software ecosystem and future Tenstorrent CPU architecture
Key requirements:
  • Master's or PhD in Computer Engineering, Electrical Engineering, Computer Science, or related field
  • Hands-on experience with runtime or compiler optimization (OpenJDK/JIT, LLVM, GCC, V8, Python, or equivalent)
  • Strong understanding of CPU performance, memory hierarchies, concurrency, garbage collection, vector/SIMD, and RISC-V architecture
  • Experience with performance profiling and analysis tools (Linux perf, runtime profilers, QEMU, tracing, performance modeling)
  • Strong programming skills in Java, Python, C/C++, and RISC-V assemblycollaborationproblem solvinganalytical thinkingruntime/compiler optimizationRISC-V architecture and vector/SIMD optimizationprofiling and performance analysis