Low-Latency FPGA & C++ Hardware Engineer

A trading technology firm in Chicago is seeking a Hardware Developer to design and optimize critical network paths and infrastructure. The ideal candidate will have over 5 years of experience in hardware development with expertise in Verilog and C++. Responsibilities include developing low-latency modules, designing network protocol drivers, and debugging code. Enthusiasm for the latest developments in circuits and FPGA boards is essential. This role offers the opportunity to work in a fast-paced environment focused on performance optimization. J-18808-Ljbffr