<Back to Search
PHY Design Verification Engineer
Millbrae, CAMarch 20th, 2026
**Role Number:** 200626837-3401**Summary**Would you like to join Apple's growing wireless silicon development team? Our wireless SoC organization is responsible for all aspects of wireless silicon development with a particular emphasis on highly energy-efficient design and new technologies that transform the user experience at the product level, all of which is driven by a world-class vertically integrated engineering team spanning RF/Analog architecture and design, Systems/PHY/MAC architecture and design, VLSI/RTL design and integration, Design Verification, Emulation, Test and Validation, and FW/SW engineering.**Description**In this highly visible role, you will be at the center of a silicon design group with a critical impact on delivering world-class silicon to empower wireless products for hundreds of millions of customers. As a PHY Design Verification Engineer, you will be responsible for pre-silicon RTL verification of wireless PHY and its interfaces with the rest of the wireless communication SoC. You will interact with DV methodologists, designers, and communication systems engineers to develop reusable test bench and verification environment deploying the latest methodology with metric-driven verification, ensuring the highest design quality.**Minimum Qualifications**+ BS and a minimum of 10 years relevant industry experience**Preferred Qualifications**+ Verification experience of wireless/wired communication block/subsystem.+ Advanced knowledge of Verilog, SystemVerilog, UVM, and SystemVerilog Assertion.+ Excellent knowledge and experience of ASIC verification flows including test bench development, constrained random testing, and code/functional coverage.+ Experience of using Matlab/C reference model and bit-accurate verification.+ Verification experience of wireless/wired communication block/subsystem.+ Knowledge of wireless protocols such as Bluetooth, UWB, WLAN, or Zigbee.+ Proficient in shell and Python scripting, Perl scripting.+ Experience of using AI technologies in data mining/analysis.+ Experience of Palladium/FPGA validation.+ Should be a team player with excellent communication skills, self-motivated and well organized.Apple is an equal opportunity employer that is committed to inclusion and diversity. We seek to promote equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics. Learn more about your EEO rights as an applicant (https://www.eeoc.gov/sites/default/files/2023-06/22-088\_EEOC\_KnowYourRights6.12ScreenRdr.pdf) .
Showing 450 of 41,677 matching similar jobs
- Product Development Engineer - Power Electronics HW DesignDearborn, MIMarch 20th, 2026
- Design Verification Engineer
- SoC Validation EngineerCupertino, CAMarch 20th, 2026
- Motor Design Engineer | Airborne HW
- Touch HW EE Validation EngineerMillbrae, CAMarch 20th, 2026
- Silicon Validation Software Engineer - High Speed IO Validation
- SerDes Design and Validation Engineer
- SoC Validation EngineerSan Diego, CAMarch 20th, 2026
- Principal FPGA Design Engineer - Onsite Tucson, AZ
- GPU Physical Verification Design Engineer
- HDL Technical Lead (FPGA)
- Principal RF Design Engineer
- Physician / Family Practice / Oregon / Permanent / Family Medicine Physician with Security Clearance
- Physician / Family Practice / Oregon / Permanent / Family Medicine Physician with Security Clearance
- Engineer
- Staff Antenna Design Engineer, Passive Entry & Connectivity Systems
- Senior Embedded Control Systems Engineer - Lunar Permanence
- RF Staff Engineer
- Senior or Principal Signal Power Integrity and Multiphysics Engineer, Texas Institute for Electronics
- Ride Control Hardware Engineer, Principal (ControlsAutomation)
- ASIC/FPGA Design Engineer (SMES)
- Electrical Hardware Engineer
- Lead Application Test Engineer - Analog & Power (Semiconductors)
- Senior RTL Design Engineer
- Principal Power Electronics - EPS Architect
- VP, A&D PCB Sales & Strategic Growth
- Lead Photonics Test Infrastructure Engineer - Automation
- Senior PCB/ECAD Designer - Rigid/Flex Boards (DoD)
- Test Automation Hardware Engineer
- Senior CPU Microarchitecture & Logic Design Engineer, Out-of-Order Execution
- Embedded Systems Engineer - AI Hardware PlatformSunnyvale, CAMarch 27th, 2026
- Senior IC Design Engineer: IO SI & PD + Equity
- Asic/Fpga Design Engineer
- ASIC/FPGA Design Engineer (SMES)
- Lead Runset Enablement Engineer - Physical Verification
- Lead IP/SOC Verification Engineer
- PIC Design Engineer
- Sr. Microarchitect & RTL Design Engineer
- Product Verification Engineer
- Senior Analog & Mixed-Signal IC Design Engineer