Design Verification Engineer

Design Verification EngineerEtched is building the hardware for superintelligence.GPUs and TPUs are flexible AI chips that can run many kinds of models: CNNs, RNNs, LSTMs, and more. But today, almost all AI workloads, from ChatGPT to self-driving cars, are done on one model architecture: transformers. Using flexible AI chips for transformers is very inefficient:Ensure shippable first silicon for Etched's first ASIC.Develop test benches for blocks and IP.Requirements:At least 2 years of relevant experience developing scalable test benches.Proven understanding of System Verilog testbench language.Experience with high speed SerDes.Willing to start quickly.Passionate about modern AIs like ChatGPT, and willing to learn about them on the job.Desired qualifications:Experience with chip-to-chip interconnects and HBM3/HBM3E technologies.Familiarity with transformer models and machine learning.Familiarity with numerical representations and functions.Ability to program with Python or another scripting language.Familiarity with open-source verification tools like Verilator.BenefitsFull medical, dental, and vision packages, with 100% of premium coveredHousing subsidy of $2,000/month for those living within walking distance of the officeDaily lunch and dinner in our officeRelocation support for those moving to San JoseHow we're differentEtched believes in the Bitter Lesson. We think most of the progress in the AI field has come from using more FLOPs to train and run models, and the best way to get more FLOPs is to build model-specific hardware. Larger and larger training runs encourage companies to consolidate around fewer model architectures, which creates a market for single-model ASICs.