IC Verification Engineer - SystemVerilog, UVM + Equity
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Broadcom Inc. is seeking a Design Verification Engineer in San Jose, California to create and deliver complex switch design verifications. Responsibilities include developing SystemVerilog-based environments and executing rigorous test plans for RTL and gatesim designs.
The ideal candidate possesses a master's degree in a technical field and at least six years of design verification experience. This role offers a competitive salary and comprehensive benefits package, including health insurance, 401(k), and stock purchase options.
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