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Analog Design Engineer - Principal
Irvine, CAMarch 27th, 2026
About the jobAre you an Analog Design Engineer, Principal who is seeking an amazing opportunity delivering disruptive High Speed Interconnect Technology powering next generation AI? We are looking for an Analog Design Engineer - someone who is excited to join a fast-growing Start-Up Company growing a group of diverse individuals responsible for handling high-speed mixed-signal circuit designs!Locations Available: Irvine, CA HQ, San Jose, CA, Austin, TX, Ottawa Ontario, CN, & VancouverCandidate will have the opportunity to architect and design circuits for high performance transceivers and other critical analog functions.What You Will Do:High speed analog circuit design, such as high-speed broadband amplifiers (VGA, CTLE, DRV, etc.).Clock generation and distribution (VCOs, PLL, clock distribution, etc)Fundamental analog blocks (bandgap references, LDOs, temp sensors, etc)New techniques for the development of next generation optical transceiverDesign of custom passive components, from concept to silicon implementationSupervise analog layouts within advanced process nodesSystem verification and circuit design spec creationSilicon bring-up, debug and supportTeam communication and documentationWhat You Will Bring:Master's degree and/or PhD (preferred) in Electrical Engineering or related fields with 5+ years of experience.Should have strong analog design fundamentals and experience in designing analog circuit blocks for broadband amplification, clock generation and distribution, and/or fundamental analog blocks.Experience with analog design and verification tools (Virtuoso, Spectre, ADE and post layout extraction tools) is a mustExperience in advance cmos design and verification flows (tools to evaluate self-heating, electromigration, safe operating area)Experience with electromagnetic simulation tools (EMX, Momentum, HFSS or other) is a plusKnowledge of the fundamentals on electromagnetism, lump models and high frequency designUnderstanding of advanced processes (e.g., FinFet) and optimization for high performance circuitsProduction level tape out experienceExperienced in lab chip bring-up and debugging efforts is a plusStrong communication and documentation skillsSalary Range$150,000 - $250,000 Annually
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