Design Verification Engineer
Occupations:
Validation EngineersElectronics Engineers, Except ComputerElectrical EngineersComputer Hardware EngineersEngineers, All OtherIndustries:
Investigation and Security ServicesEmployment ServicesSchool and Employee Bus TransportationSpectator SportsComputer and Peripheral Equipment ManufacturingJob Title: Low Power Design & Verification EngineerPrimary Skills: UPF/VCLP with Low Power expertise Location: Bay area (onsite)Duration : 12+ MonthsJob Description :UPF/VCLP with Low Power expertise ng a skilled Low Power Design & Verification Engineer with strong expertise in UPF (Unified Power Format) and VCLP (VC Low Power). The ideal candidate will be responsible for defining, implementing, and verifying low-power architectures in complex SoC designs, ensuring compliance with power intent and design specifications.Key ResponsibilitiesDevelop and implement power intent using UPF (IEEE 1801) Define and manage power domains, power states, and supply networks Perform low power verification using VCLP (Synopsys VC LP)Thanks Shaik SadeqEmail: Sadeq@infobahnsw.com