Senior UVM Verification Engineer (Remote/FPGA-ASIC)
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A leading nonprofit research organization in Cambridge, MA is seeking a motivated Senior UVM Digital Verification Engineer to tackle verification challenges in FPGAs and ASICs. This role requires collaboration across multidisciplinary teams to apply modern verification strategies to complex designs, including embedded security and signal processing. The ideal candidate will have significant experience in verification methodologies and be adept in using various engineering tools.#J-18808-Ljbffr